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AM62L: eMMC boot failure in reduced pin mode

Parv Patel
Prodigy 80 points
Part Number: AM62L

Tool/software:

Hii, 

I am using AM62L board. I want to boot board from eMMC reduced pin configuration. 
I tried below configuration and also write the condition according to boot: 

Pins  Boot Mode Options pins  Details of pins  eMMC UDA (Reduced) Pri: eMMC Backup:MMC1/SD SD card (Reduced) Pri: MMC/SD Backup:UART eMMC (Reduced) Pri: eMMC backup: USB DFU
0 B0 PLL Reference Clock Selection 0 0 0
1 B1 0 0 0
2 B2 0 0 0
3 B3 Primary Boot Mode 0 0 0
4 B4 0 0 0
5 B5 0 0 0
6 B6 0 0 0
7 B7 Primary Bootmode
Configuration		 0 0 0
8 B8 0 0 0
9 B9 0 0 0
10 B10 Backup Mode Selection 0 0 0
11 B11 0 0 0
12 B12 1 0 0
13 B13 1 1 0
14 B14 Full/Half Pin Selection  0 0 0
15 B15 1 1 1
Condition No logs display on console Run Perfectly  No logs display on console & device detected as DFU 



Best, 
Parv

  • 0
    TI__Guru 68470 points

    Hi Parv,

    As noted from <Table 5-3. BOOTMODE Pin Mapping (Reduced)> in AM62L TRM https://www.ti.com/lit/pdf/sprujb4
    BOOTMODE[15:12] = 1011 => Fixed 4 => eMMC Boot Partition (primary) MMC (backup)
    BOOTMODE[15:12] = 1010 => Fixed 3 => MMC/UDA (primary) UART (backup)
    BOOTMODE[15:12] = 1000 => Fixed 1 => eMMC Boot Partition (primary) USB-DFU (backup)

    As noted from <Table 1-2. Advisories Matrix> in AM62L Errata https://www.ti.com/lit/pdf/sprz582, there're eMMC boot issues from eMMC boot partition in AM62L PG1.0 ROM, and your test struck the eMMC boot issues.

    Best,
    -Hong

  • 0 in reply to Hong Guan64
    Prodigy 80 points

    Hi Hong, 

    As you suggest BOOTMODE[15:12] = 1010 => Fixed 3 => MMC/UDA (primary) UART (backup) and also given in Errata like to use eMMC UDA mode. 

    I put board with this pin mode in MMC/UDA (primary) UART (backup) (0-15: 00000000 0000 0101) without SD card, I can't see any log on UART console.
    But when I put SD card in same pins configurations, Board is booting from eMMC. Here I also attach image of it. 


    In BOOTMODE[15:12] = 1011 => Fixed 4 => eMMC Boot Partition (primary) MMC (backup), 
    I put board in this pin's configuration; I can't see any log in UART console.

    In BOOTMODE[15:12] = 1000 => Fixed 1 => eMMC Boot Partition (primary) USB-DFU (backup),
    I put board in this pin's configuration; I can't see any log in UART console. 
    But it is going to USB-DFU mode, because it is showing me in lsusb command like ID 0451:6165 Texas Instruments, Inc. AM62L DFU

    Best, 
    Parv 


  • 0 in reply to Parv Patel
    TI__Guru 68470 points

    Hi Parv,
    With AM62L PG1.1 fixes on ROM as noted in <Table 1-2. Advisories Matrix> in AM62L Errata https://www.ti.com/lit/pdf/sprz582, I'd recommend re-run your test on AM62L PG1.1 silicon.
    Best,
    -Hong

  • 0 in reply to Hong Guan64
    Prodigy 80 points

    Hi Hong, 

    I am using AM62L EVM part number (XAM62L32AOGHAANB).
    Could you please confirm that you are referring the PG1.0 as the same Device revision number is as SR1.0 or different?
    Is there any workaround to test this in PG1.0?

    Best, 
    Parv 

  • 0 in reply to Parv Patel
    TI__Guru 68470 points

    Hi Parv,
    My recommendation is running test with the latest AM62L Silicon Revision 1.1
    Best,
    -Hong

  • 0 in reply to Hong Guan64
    Prodigy 80 points

    Hi Hong, 

    I do not have the Rev 1.1 silicon EVM with us, could you please run at your end and confirm that eMMC boot is working with reduced pin configuration as well. Please share the logs for same.
    Could you please confirm that you are referring the PG1.0 as the same Device revision number is as SR1.0 or different?
    Does TI have PG1.1 silicon parts available to buy?

    Best, 
    Parv

  • 0 in reply to Parv Patel
    TI__Guru 68470 points

    Hi Parv,
    I'm attaching a sample log booting from eMMC boot partition on AM62L SR 1.1 silicon,
    where BOOTMODE[15:0] = 8000 => Fixed 1 in reduced boot mode => eMMC Boot Partition (primary) USB-DFU (backup)

    I'd recommend getting in touch with TI local sales team on how to order AM62L SR 1.1 silicon
    Best,
    -Hong

    Fullscreen am62l_sr1.1_eMMC_boot_bm=8000.log Download 
    NOTICE:  bl1_plat_arch_setup arch setup 
NOTICE:  Booting Trusted Firmware
NOTICE:  BL1: v2.12.0(release):11.00.15
NOTICE:  BL1: Built : 19:37:58, Jul  7 2025
NOTICE:  BL1: dram_class: 11
NOTICE:  lpddr4: post start - PI training status=0x27c0a000 
NOTICE:  bl1_platform_setup DDR init done
NOTICE:  k3_bl1_handoff ENTERING WFI - end of bl1
NOTICE:  BL31: v2.12.0(release):11.00.15
NOTICE:  BL31: Built : 19:37:59, Jul  7 2025
NOTICE:  SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.12-v11.00.12 (Fancy Rat)')
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported

U-Boot SPL 2025.01-g1d6ba4a32cdd-dirty (Aug 29 2025 - 14:41:43 -0500)
SPL initial stack usage: 1872 bytes
Trying to boot from MMC1
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported


U-Boot 2025.01-g1d6ba4a32cdd-dirty (Aug 29 2025 - 14:41:43 -0500)

SoC:   AM62LX SR1.1 HS-FS
Model: Texas Instruments AM62L3 Evaluation Module
DRAM:  2 GiB
ERROR:   Agent 0 Protocol 0x10 Message 0x7: not supported
Core:  80 devices, 31 uclasses, devicetree: separate
MMC:   mmc@fa10000: 0, mmc@fa00000: 1
Loading Environment from nowhere... OK
In:    serial@2800000
Out:   serial@2800000
Err:   serial@2800000
Net:   eth0: ethernet@8000000port@1
Warning: ethernet@8000000port@2 (eth1) using random MAC address - 52:c6:45:3a:34:3c
, eth1: ethernet@8000000port@2
Hit any key to stop autoboot:  2  0 
=> md.l 0x43000000
43000000: 61800215 080a0000 00000000 00000000  ...a............
43000010: 00000000 1bba702f 7234f3e6 00000000  ..../p....4r....
43000020: 52720001 00000000 0850e110 0107ba70  ..rR......P.p...
43000030: 00000000 00000000 00000000 00000000  ................
43000040: 00000000 00000000 00000000 00000000  ................
43000050: 00000000 00000000 00000000 00000000  ................
43000060: 00000003 00000791 00000000 00000000  ................
43000070: 00000000 00000000 00000000 00000000  ................
43000080: 00000000 00000000 00000000 00000000  ................
43000090: 00000000 00000000 00000000 00000000  ................
430000a0: 00000000 00000000 00000000 00000000  ................
430000b0: 00000000 00000000 00000000 00000000  ................
430000c0: 00000000 00000000 00000000 00000000  ................
430000d0: 00000000 00000000 00000000 00000000  ................
430000e0: 00000000 00000000 00000000 00000000  ................
430000f0: 00000000 00000000 00000000 00000000  ................
=>

  • 0 in reply to Hong Guan64
    TI__Expert 6256 points

     ,

    To add to Hong's comments,

    AM62L SR 1.1 Support is part of public repository now. 

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tag/?h=11.01.12 

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/tag/?h=11.01.12 

    Related fixes for SR 1.1 

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=11.01.12&id=556593b8d5f39ad77327d2e7aa190d3faae5a350 

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=11.01.12&id=ff97a7d9463442320a6a02320070a68b69e5c26d 

    https://git.ti.com/cgit/ti-u-boot/ti-u-boot/commit/?h=11.01.12&id=7632f2b70bd2ad788c31cdf6f97499f2f5962ae0 

    https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/commit/?h=ti-linux-6.12.y&id=48909ce1943214384cf82c76f710adf6994649ed 

    https://git.yoctoproject.org/meta-ti/commit/?h=scarthgap&id=0a02cd559a07af33a8111a1f5777b14862a52227 

    https://git.yoctoproject.org/meta-ti/commit/?h=scarthgap&id=eb8b398f6571511336cb8644c547a28d3941ebfa 

    Once you get the right EVM version , as long as you are on latest code base with mentioned patches you will see eMMC functional.

    --

    For SR 1.0 eMMC UDA  workaround details are here:

    https://texasinstruments.github.io/processor-sdk-doc/processor-sdk-linux-AM62LX/esd/docs/11_00_15_05/linux/How_to_Guides/Target/How_to_mmcsd_boot_emmc_uda.html 

  • 0 in reply to Praneeth Bajjuri
    Prodigy 80 points

    Hii, 

    Can you please give me part number of SR1.1 silicon?
    My EVK with SR1.0's part number is XAM62L32AOGHAANB.

    Best,
    Parv

  • 0 in reply to Parv Patel
    TI__Guru 68470 points

    Hi Parv,
    In reference to <Table 9-1. Nomenclature Description> in AM62L datasheet https://www.ti.com/lit/ds/symlink/am62l.pdf, The <Device revision> field increments from "A" to "B" for SR 1.1 silicon.


    Please work with TI local team on on how to order AM62L SR 1.1 silicon.
    Best,
    -Hong