We're developing an 816x-based product in which it's critical that the DSP code runs uninterrupted, even if something goes wrong with the linux system running on the "Monza" ARM Cortex-A8 subsystem. This means we need an isolation barrier preventing the ARM core from resetting or otherwise interfering with the DSP core and the peripherals it uses (McASP, one of the EMACs), and have one of the many cores take on a supervisory role for the SoC, e.g. acting as a watchdog for the Monza core.
The 816x documentation is unfortunately rather vague on details, so I have some questions:
- The only obvious way I see to isolate the Monza is by configuring the L3 and L4 interconnect firewalls, but the 816x documentation is severely lacking in details on these. If I understand correctly the 816x uses the same interconnect as the dm37x, so can I use the documentation from its techref to configure the firewalls or will that not work?
- I find the same lack of documentation on the media controller subsystem of the 816x, whereas it is properly documented for the 814x. Can I program the dm816x or c6a816x media controller in the same way as the dm814x? If we were to do so, will we ever be able to combine this with its usual firmware? (We currently do not use video in or out, but it is an option for the future.)
- The interconnect matrix suggests that (other than via JTAG) only Monza can configure the interconnects, is that correct? Any chance that on a GP device, where no secure boot is used, the security subsystem Cortex-M3 (which I presume also has access to the interconnect registers) can be put to useful work instead of sitting there twiddling its thumbs?
Thanks!
Matthijs van Duin
Rinnic/Vaude
