AM6442: GPIO irq delay test

pingan fan

Part Number: AM6442

Tool/software:

I am conducting a GPIO interrupt experiment on the AM6442. One GPIO input receives a high-level signal, and the interrupt triggers another GPIO to output a high-level signal. I tested both the A-core and the R-core separately, running 10 tests for each core. However, I found that the maximum latency of the R-core is actually higher. Why is this happening? Isn't the R-core a real-time core? Why does the R-core exhibit higher latency?

25 days ago

0 Johnson John 25 days ago

TI__Prodigy 580 points

Hi Pingan,

Please expect a delay in response due to today being holiday in TI India.

Regards,
Johnson

0 Tushar Thakur 24 days ago

TI__Mastermind 49358 points

Hi Pingan,

pingan fan said:
Why does the R-core exhibit higher latency?

Can you please specify the numbers?

pingan fan said:
I tested both the A-core and the R-core separately, running 10 tests for each core.

How are you testing this?

One GPIO triggers another GPIO in ISR. Does this mean you are making a pin high inside ISR?

Regards,

Tushar

0 pingan fan 24 days ago in reply to Tushar Thakur

Prodigy 125 points

Hi Tushar,
This is how I conducted the test: I applied a 3.3V high level to a GPIO pin. When the CPU detects this high level, it triggers an interrupt. The interrupt handler then sets another GPIO pin to high level. I used an oscilloscope to capture the time gap between these two level transitions. The test results are shown in these images.
A core:

R core: