• State
  • Replies 5 replies
  • Subscribers 101 subscribers
  • Views 121 views
  • Users 0 members are here
Support feedback
Options
Options
Related

AM625: SDHCI PHY block documentation

Alexander Sverdlin
Prodigy 60 points
Part Number: AM625

Tool/software:

Dear TI engineers!

Is the documentation for SDHCI block and corresponding PHYs available publicly somewhere?

We would like to understand what ti,driver-strength-ohm Device Tree property of sdhci_am654 driver actually achieves in HW, and why the documented SDIOx_CTRL_DRV_STR bits of SDIOx_CTRL (TRM 14.2.1.1.1 CTRL_MMR Registers) do not apply.

  • 0
    Prodigy 195 points

    Could be that it is the same as for the GPIO's where only the default is available but NOM and FAST (and maybe SLOW) will be available in the future.

    //Jørgen

  • 0 in reply to jorgen.olsen
    TI__Guru 63145 points

    I'm not familiar with SDHCI, but it appears to be an industry standard software driver used to communicate with an SD Card. If so, I assume you are asking why the IOs associated with the AM62x MMC ports do not support all of the optional source impedances defined in the eMMC and SDIO standards.

    The pins associated with the MMC ports also needs to support other signal functions which can be multiplexed to them. Therefore, IOs associated with the MMC ports were configured to a fixed source impedance of 40 ohms, which is one of the optional source impedances defined in the eMMC and SDIO standards. The fixed source impedance of 40 ohms provides an acceptable level of signal integrity for all possible signal function options, including communications with an SD Card.

    Why do you feel it is necessary to change the source impedance associated with these pins?

    Regards,
    Paul

  • 0 in reply to peaves
    Prodigy 60 points
    peaves said:

    Why do you feel it is necessary to change the source impedance associated with these pins?

    In particular to test/understand the contribution of the SDIO/MMC to the overall electromagnetic emissions.

  • 0 in reply to Alexander Sverdlin
    Prodigy 195 points

    If running SDR104 then of course the fastest rise time of the signal (1ns) is needed but running SDR25 or DDR50 at 50MHz then the required rise time is 4ns. Hence the fast rise time is not necessary and if EMI is a problem that can be found arising from this interface then an increase of the rise time to 4ns could reduce the emitted noise. 

    //Jørgen (with a design where we are tracing some EMI issues around 600MHz)

  • 0 in reply to jorgen.olsen
    TI__Guru 63145 points

    Unfortunately, that is not an option because all of the various peripherals which can potentially use the pins were timing closed with the fixed source impedance.

    Regards,
    Paul