AM6442: AM243x: Time Sync Router (TSR) - EPWM to PRU Configuration

Part Number: AM6442

Tool/software:

I’m trying to understand how to set up a connection for a synchronization signal between EPWM and PRU. The goal is to trigger the PRU Task Manager at the zero-crossing point of the EPWM, similar to what appears to be done in the SDFM example. I want the sync signal to reset the IEP counter, which then generates a CMP event at the zero-crossing and at other defined counter values.

However, I couldn’t find any TSR configuration in that example.

A few questions I’m hoping to clarify:

  • Is the recommended approach to configure TSR via direct register writes from PRU, or should this be handled through SYSFW?
  • If SYSFW is involved, is there an example or documentation showing how to define these interrupt routes in the resource configuration?
  • The R5F core should be initialized from Linux. The R5F then initialize the PRU. The RPU sets the required resources or should it be done by R5F?

Best regards,
Niklas Haase

  • Hello Niklas,

    It does look like you could route an input event from EPWM0, 3, or 6 to the PRU subsystem through the time sync router:

    Technical Reference Manual (TRM) table "TIMESYNC_INTRTR0 Interrupt Map"

    I would suggest configuring the TSR from a single location.

    So if you are already configuring part of the TSR from Linux (e.g., if you were routing a PPS signal from CPSW Ethernet to an output pin), then it would make sense to just add the configuration to the Linux devicetree file.

    If nobody else is configuring the TSR, the PRU could also program it with direct register writes.

    Who is setting up the PWM peripheral? e.g., is this controlled by Linux, the R5F core, or the PRU core?

    In general, if the PRU will be the core interacting with a peripheral during runtime (e.g., if the PRU core was sending and receiving data to one of the SPI hardware peripherals), I would suggest initializing the peripheral from the PRU. That way you know that the Linux driver that initialized a peripheral will not touch the peripheral during runtime and interrupt a PRU transaction.

    If this is something like a one-time configuration of interrupt routing, then it does not matter so much which core is doing the configuration.

    Regards,

    Nick