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The discrepancy between TMS320C5535/34/33/32 TRM and C55 Low Power Chip Support Library V2.50

Jaroslaw Czula
Prodigy 150 points
Other Parts Discussed in Thread: TMS320C5535, C55X-AUDIOFRAMEWORK, TMS320C5533

Hi,

I bought TMS320C5535 eZdsp USB Kit and start to learn about USB support.
I would like to build multichannel USB Audio DAC working in anynchronus mode.
At this moment I finished USB to SPDIF converter based on TAS1020B (also anynchronus mode) I try migrate to C5535.

In "TMS320C5535/34/33/32 Ultra-Low Power DSPTechnical Reference Manual" we can find information about USB PHY initalization.
Information is clear and understandable.

13.2.6 USB PHY Initialization
The general procedure for USB PHY initialization consists of enabling the USB on-chip oscillator,
configuring PHY parameters, and finally resetting the PHY. The detailed USB PHY initialization sequence
is as follows:
1. The bits USBOSCBIASDIS and USBOSCDIS in the USB system control register (USBSCR) should be
cleared to 0 to enable the on-chip USB oscillatory if not enabled already.
2. Wait cycles for the on-chip oscillator to stabilize. Refer to the device-specific data manual for oscillator
stabilization time.
3. To configure the PHY for normal operation, the bits USBPWDN, USBSESSEND, and USBPLLEN in
USBSCR should be cleared to 0, the USBVBUSDET bit should be set to 1, and the USBDATPOL bit
should be set according to the system requirements (set to 1 for normal operation).
4. Enable the USB clock by clearing USBCG to 0 in the peripheral clock gating configuration register 2
(PCGCR2).
5. Set the USBCLKSTPREQ bit.
6. Set COUNT = 20h in the peripheral software reset counter register (PSRCR).
7. Reset the USB controller by setting USB_RST to 1 in the peripheral reset control register (PRCR). This
bit will self-clear once the reset has been completed.

But when I started to analyze USB_init procedure in "C55 Low Power Chip Support Library V2.50" i found completely different sequence:

1. Set COUNT = 20h in the peripheral software reset counter register (PSRCR).
2.Reset the USB controller by setting USB_RST to 1 in the peripheral reset control register (PRCR).

In TRM 13.2.11.1 wh have information:
"When USB_RST is set to 1, a hardware reset is forced on the USB controller.
Please note that the USB input clock must be enabled when using USB_RST"

But the USB oscillator is disabled and USB Clock is off.

3.Enable the USB clock by clearing USBCG to 0 in the peripheral clock gating configuration register 2 (PCGCR2).
4.Clear bits USBPWDN, USBPLLEN,USBOSCBIASDIS and USBOSCDIS in the USB system control register (USBSCR)
5.Set the USBCLKSTPREQ bit.
6. RESET USB once again by set bit RESET in CTRLR

Can someone explain these discrepancies?

Another problem is that the library "C55 Low Power Chip Support Library V2.50" is available from "http://software-dl.ti.com/dsps/dsps_public_sw/dsps_swops_houston/C55X/CSL-c55x-lowpower-versions.htm" and  the same V2.50 library is a part of "C55X-AUDIOFRAMEWORK " but there are  few differences (with no explanation).

Best regards
Jarosław Czuła

PS I'm sorry but my English is poor


  • 0
    TI__Mastermind 30140 points

    Hi Jarosław,

    Sorry for the delay.

    See the comparison between TAS1020B and TMS320C5533 on the wiki page: http://processors.wiki.ti.com/index.php?title=TAS1020B_vs_TMS320C5533_Comparison

    I have asked someone from the software team to look into the discrepancies you reported:

    1. Differences in USB PHY initalization between TMS320C5535/34/33/32 Ultra-Low Power DSP Technical Reference Manual and C55 Low Power Chip Support Library V2.50

    2. Differences in the C55 Low Power Chip Support Library V2.50 included with the C55X-AUDIOFRAMEWORK and the C55 Low Power Chip Support Library V2.50 available online.

    Please let us respond next week.

    Good catches! Thanks for contributing to the forum.

    Best Regards,
    Mark

  • 0
    TI__Guru 55315 points

    Hi Jaroslaw,

    Good Catch.

    The TRM is correct. The USB initialization order in CSL 2.50 is incorrect. Basically the USB clock de-gating and the USB reset should be the two last steps (not in the beginning). We will correct this bug in next CSL release.

    The CSL 2.50 and the CSL used in the Audio Framework have slight difference. All the changes are in USB core driver csl_usb.c, csl_usb.h and csl_usbAux.h and USB audio class driver csl_audioClass.c, csl_audioCalss.h and csl_audioClassAux.h. Since USB Audio Class Framework is now a independent release, so the USB core driver and USB audio class driver have been changed to meet their needs. The CSL 2.50 on the other hand added the USB CDC class and removed the USB audio class. If your focus is on USB audio class, please keep using the CSL in the USB audio framework. We are planning to unify the USB core driver in next CSL release, but we will not include USB audio class support in future CSL release and keep USB audio framework as a seperate release.

    Thanks a lot!

     

    Ming

  • 0 in reply to Ming Wei
    Prodigy 150 points

    Hi,

    Thank you for your answer.
    And now another question.


    Library CSL 2.50, file usbAux.h  procedure USB_readEP0Buf

    1. Why only in this procedure for saving INDEX_TESTMODE register such code is used

    /* save the index register value */
     saveIndex = (usbRegisters->INDEX_TESTMODE &  CSL_USB_INDEX_TESTMODE_EPSEL_MASK);

    but in all other procedures

     /* save the index register value */
     saveIndex = usbRegisters->INDEX_TESTMODE;

    2. Procedure USB_readEP0Buf is called when bit RXPKTRDY in register PERI_CSR0 is set.
    After reading FIFO bit SERV_RXPKTRDY should be set, optional bit DATAEND should be set.
    But in error case:

    if ((packetSize > CSL_USB_MAX_EP0_FIFO_LEN) ||  (packetSize > pContext->cbOutEP0DataReceived))
        {
           /* restore the index register */
           usbRegisters->INDEX_TESTMODE &= ~(CSL_USB_INDEX_TESTMODE_EPSEL_MASK);
           usbRegisters->INDEX_TESTMODE |= saveIndex;
           return;
        }

    SERV_RXPKTRDY is not set, so next pocket will not be received.
    Is this reaction correct?

    Best regards,
    Jarosław Czuła




  • 0 in reply to Jaroslaw Czula
    TI__Guru 55315 points

    Hi Jaroslaw,

    1. If you look at the way saveIndex is used in USB_readEP0Buf(). It is always like:

     /* restore the index register */
     usbRegisters->INDEX_TESTMODE &= ~(CSL_USB_INDEX_TESTMODE_EPSEL_MASK);
     usbRegisters->INDEX_TESTMODE |= saveIndex;

    While the others is like:

     usbRegisters->INDEX_TESTMODE = saveIndex;

    2. This happens when the received packet size is too big. I agree it should be some kind of error message returned to upper level. The simple return is not correct. On the other hand, just set the SERV_RXPKTRDY bit and return is also not correct. I think the correct way is to set the SERV_RXPKTRDY bit and return an error meaasge to upper level function. The up level function then stall the EP0.

    Best regards,

    Ming