Tool/software:
Hi,
We're currently working on a PTP time server that will use GNSS (NMEA + 1PPS) as the time source. The final target is AM62x, but we’re doing development and experiments on an AM3358 BeagleBone Black first. I’d appreciate a short reality-check / guidance so we take the right approach before porting to AM62x.
Short summary
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Board: BeagleBone Black (AM3358) — kernel: Linux BeagleBone 5.10.168-ti-r71
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Goal: use GNSS NMEA (UART) + 1PPS to discipline a PHC via ts2phc (and then phc2sys - system clock). Nano-second class accuracy is desired.
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Problem: GPIO-based pps-gpio gives poor jitter and is not acceptable for final solution. We need hardware timestamps (CPTS/timer capture).
What we’ve tried (quick list)
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Used GPS NMEA on UART4 (P9.11/P9.13) — NMEA is fine.
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Tried PPS on a GPIO (pps-gpio - /dev/pps0). Confirmed /dev/pps0 works but timestamps are noisy. ts2phc generic with GPIO gave no locking. ("poll returns zero, no events")
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Investigated timer/timer-capture paths (Timer4 on P8_07 etc.) and Dan Drown’s pps-gmtimer project (timer-capture - PPS). Attempted to build/use pps-gmtimer, hit kernel/compatibility problems on 5.10-ti. (github.com/.../)
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Tried writing DT overlays (timer PWM vs capture) to route a timer pin to CPTS, and experimented with cpts-ext-ts-inputs / ti,pps ideas. /sys/class/ptp/ptp0/n_external_timestamps : (PHC reports 4 external timestamp inputs), but we don’t yet get any CPTS timestamps from our GPS PPS pin.
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We deliberately avoided pps-gpio long-term; we want the PPS routed into hardware timestamping (PHC) rather than software edges.
Questions:
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Recommended approach for AM3358: For a project that will later be moved to AM62x, do you recommend (A) using CPSW/CPTS external timestamp inputs directly by wiring PPS to the CPTS-capable pin (if so, how to capture the signals), or (B) using timer-capture (TimerX capture) + a small kernel driver (like pps-gmtimer) that exposes /dev/pps0? Which approach is TI’s recommended/best-supported path for GNSS 1PPS - PHC on AM335x and portable to AM62x?
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Pin - HW_TS_PUSH mapping: On AM3358 (BeagleBone) which physical header pins are safe / canonical to use for CPTS external timestamps (HW_TS_PUSH)? We saw n_external_timestamps=4; how do we reliably map a chosen pin (e.g. P8_07 - timer4) to the ts_input index (the pin_index used by ts2phc)? Is there a canonical doc/page with the exact TIMESYNC router / input indices for AM3358?
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Device Tree properties: TI docs mention cpts-ext-ts-inputs and ti,pps style DT properties. Can you share a minimal, canonical DT snippet for AM3358 that: (a) preserves UART4 for NMEA, (b) routes Timer4 (or a CPTS-capable pad) as an external TS input for PHC (and indicates how the kernel exposes the ts_input index)?
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ts2phc pin_index mechanics: How should we choose --ts2phc.pin_index? Which sysfs entries (exact path/file) should we inspect to verify pin_index -physical pin mapping?
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AM62x migration notes: For AM62x, the docs mention CP_GEMAC_CPTS0_HW1TSPUSH and the timesync_router changes. Is there a direct mapping approach we should follow to make our AM3358 DT changes portable to AM62x (i.e., we’d like a small list of steps or DT patterns to replicate on AM62x).
What I’m asking from you
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A short recommendation which approach to pursue on AM3358 (CPTS direct pin routing vs timer-capture + small driver) — pros/cons.
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A minimal, tested DT pattern or a pointer to the canonical sample that shows mapping of physical pad -HW_TS_PUSH input for AM3358.
Thanks in advance for any pointers or short snippets you can share, even a one-paragraph “do X with Y pin and set DT property Z” will be extremely helpful for us to unblock the next test iteration.