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[FAQ] J722SXH01EVM: How to enable McSPI on the 40 pin user expansion header for the J722SXH01EVM?

Part Number: J722SXH01EVM
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

The J722SXH01EVM has a 40 pin header and a few McSPI interfaces are routed to this header? How to enable the pins for McSPI?

  • About:

    Validated on 10.1 Linux SDK and built on top of the prebuilt image of 10.1 Linux SDK. This enables only MCU SPI0 and Main SPI2. Main SPI0 also has some connections to the 40 pin header. However, D1 is not connected to header by default for Main SPI0 so patch does not enable.

    The enumeration are the following when I was testing. Although, numbers that are enumerated may change. Can use "ls -l /sys/class/spi*" to check as documented in application note below.

    • spidev1.0 is spi1 is mcu_spi0 master
    • spidev3.0 is spi3 is main_spi2 slave

    FAQ follows application note: https://www.ti.com/lit/an/sprad26/sprad26.pdf?ts=1756502475801&ref_url=https%253A%252F%252Fwww.google.com%252F 

    Instructions:

    1.

    Apply below patch to the Linux kernel:

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/3603.0001_2D00_Enable_2D00_J722S_2D00_Main_2D00_SPI2_2D00_and_2D00_MCU_2D00_SPI0_2D00_in_2D00_devicetree.patch

    Explanation of patch:

    Patch should create below dtso file and edit the Makefile to build new devicetree source overlay file.

    https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/791/3603.k3_2D00_j722s_2D00_evm_2D00_mcspi.dtso

    Patch consists of the following:

    1. Adding new devicetree overlay: +dtb-$(CONFIG_ARCH_K3) += k3-j722s-evm-mcspi.dtso
    2. Adding pinmux for SPI in main domain under main_pmx0 for main_spi2 interface. Pinmuxing is done using sysconfig: https://www.ti.com/tool/SYSCONFIG 
    3. Adding pinmux for SPI in MCU domain under mcu_pmx0 for mcu_spi0 interface
    4. Defining main_spi2 with the following:
      1. Using the pinmuxing: pinctrl-0 = <&main_spi2_pins_default>;
      2. Defining DMA uand using PSIL values from TISCI documentation: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j722s/psil_cfg.html .
      3. Defining as spi-slave.
      4. Defining slave node as slave@0. It is important node name is either slave@something or slave as software looks for these names
      5. Using rohm,dh2228fv compatible field. This is one of the many compatible fields that simply point to the generic spidev driver
    5. Defining mcu_spi0 with the following:
      1. Using the pinmuxing: pinctrl-0 = <&mcu_spi0_pins_default>;
      2. Setting d0 and d1 input/output direction using ti,pindir-d0-out-d1-in
      3. Defining spidev node.
      4. Note that there is no DMA support for MCU domain SPI for J722S as there is no PSIL threads allocated.

    *NOTE: 10.1 SDK for J722S looks to have CONFIG_SPI_SLAVE=y in defconfig. However, may need to add this in for other SDK versions to defconfig.

    2. 

    Build the Linux devicetree and flash new dtbo file. Can use the Top-Level Makefile or any other method to build and flash Linux kernel: https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-j722s/11_00_00_08/exports/docs/linux/Overview_Top_Level_Makefile.html

    3. 

    Build spidev_test. How to build spidev_test is documented in application note: https://www.ti.com/lit/an/sprad26/sprad26.pdf?ts=1756502475801&ref_url=https%253A%252F%252Fwww.google.com%252F 

    4. 

    In boot partition, edit uEnv.txt such that the name_overlays U-Boot variable points to the newly created devicetree overlay. Like below:

    • name_overlays=ti/k3-j722s-evm-mcspi.dtbo

    5.

    Connect main spi2 and mcu spi0 on user expansion header. Connection like below:

    • GPIO11 - MCU SPI0 CLK <-> GPIO14 - Main SPI2 CLK
    • GPIO9 - MCU SPI0 D1 <-> GPIO17 - Main SPI2 D1
    • GPIO10 - MCU SPI0 D0 <-> GPIO22 - Main SPI2 D0
    • GPIO8 - MCU SPI0 CS0 <-> GPIO15 - Main SPI2 CS0

    6. 

    Boot and login.

    7. 

    Run spidev_test

    • ./spidev_test -v -D /dev/spidev3.0 -p slave-hello-to-master &
    • ./spidev_test -v -D /dev/spidev1.0 -p master-hello-to-slave

    root@j722s-evm:~# ./spidev_test -v -D /dev/spidev1.0 -p master-hello-to-slave
    spi mode: 0x0
    bits per word: 8
    max speed: 500000 Hz (500 kHz)
    TX | 6D 61 73 74 65 72 2D 68 65 6C 6C 6F 2D 74 6F 2D 73 6C 61 76 65 __ __ __ __ __ __ __ __ __ __ __  |master-hello-to-slave|
    RX | 73 6C 61 76 65 2D 68 65 6C 6C 6F 2D 74 6F 2D 6D 61 73 74 65 72 __ __ __ __ __ __ __ __ __ __ __  |slave-hello-to-master|
    TX | 73 6C 61 76 65 2D 68 65 6C 6C 6F 2D 74 6F 2D 6D 61 73 74 65 72 __ __ __ __ __ __ __ __ __ __ __  |slave-hello-to-master|
    RX | 82 6D 61 73 74 65 72 2D 68 65 6C 6C 6F 2D 74 6F 2D 73 6C 61 76 __ __ __ __ __ __ __ __ __ __ __  |master-hello-to-slave|
    [1]+  Done                    ./spidev_test -v -D /dev/spidev3.0 -p slave-hello-to-master
    root@j722s-evm:~#

    Regards,

    Takuma