TDA4VM: Feasibility of TDA4VM 8-Lane PCIe with Xilinx FPGA

Tool/software:

Hi TDA4VM Champ !

We're trying to use a TDA4VM to handle an imaging processing task. The TDA4VM needs to receive 200-megapixel image data from a remote FPGA via a PCIe interface.

According to the SDK documentation, the J721E's SERDES instance seems to support only combinations of 2-lane and 4-lane PCIe configurations across its four total channels.

A customer has asked if it's possible to configure the PCIe interface as a single 1x8 lane setup. Since the Xilinx FPGA supports 8 lanes for PCIe, they're asking:

1. Can the TDA4VM combine two channels to form a single 8-lane channel?

2. Can you provide a driver that supports this configuration?

Please provide your feedback on this inquiry.

Thanks.
Regards, 
Jack