LMG3100R017: Questions regarding LMG3100R017 for 3-phase BLDC inverter application

Guru 12050 points
Part Number: LMG3100R017

Tool/software:

Hi,

We are currently evaluating the LMG3100R017 (GaN device with integrated gate driver) for use in a 3-phase BLDC motor inverter (reaction wheel application). We would like to confirm the following points:

  1. Are there any adoption or reference cases of the LMG3100R017 in 3-phase BLDC motor applications?

  2. Is there a possibility that a snubber circuit will be required? If so, would it be appropriate to place snubber pads between the DRN and SRC pins?

  3. Since the driver and FET are integrated in a single package, what is the recommended method for evaluating the Safe Operating Area (SOA) during switching in practical measurements?

●Operating conditions

  • Application: 3-phase BLDC motor (reaction wheel) inverter circuit

  • Motor voltage range (Vds): 24V–34V

  • Switching frequency: 160kHz–240kHz

  • Current: 20A average, ΔI=10A ripple

We would appreciate your guidance on the above questions.

Best regards,

Conor

  • Hi Conor,

    Here are some answers for you:
    1. We have a 3-phase BLDC reference design you can take a look at: TIDA-010276 which uses LMG3100. This could give you a good starting point
    2. in some cases a snubber can be used, however LMG3100 has an adjustable turn-on slew rate, so it may not be needed. Depending on your EMI and motor requirements, the adjustable slew rate control may be enough
    3. Our driver and GaN are designed and qualified together, taking much of the design risk away from the customer. Gate overcharge and UVLO shoot through are avoided by using an integrated TI solution.
    Our SOA curve for LMG3100 is posted in the datasheet figure 5-8, and lists the GaN specific stress for varying pulse widths. This is a reliable method to validate the GaN in your system

    Let me know if you have any further questions

    Thanks,
    Zach S

  • Hi,

    Thank you very much for your response and the helpful guidance.

    3. Our driver and GaN are designed and qualified together, taking much of the design risk away from the customer. Gate overcharge and UVLO shoot through are avoided by using an integrated TI solution.
    Our SOA curve for LMG3100 is posted in the datasheet figure 5-8, and lists the GaN specific stress for varying pulse widths. This is a reliable method to validate the GaN in your system

    Just to confirm, we are considering the use of LMG3100R017 under the following operating conditions:

    • Application: 3-phase BLDC motor inverter (reaction wheel)

    • Bus voltage (VDS stress): 24–34 V

    • Switching frequency: 160–240 kHz (typ. 200 kHz)

    • Current: 20 A average, ripple ΔI = 10 A (Ipk ≈ 25 A, Ivalley ≈ 15 A)

    We would like to kindly ask for further clarification regarding the Safe Operating Area (SOA) shown in Figure 5-8 of the datasheet:

    1. Temperature condition
      – Our understanding is that “TC = 25 °C” refers to the case temperature condition, and that each curve represents the limit where the junction temperature remains below TJ,max for the given pulse width. Could you please confirm?

    2. Pulse Width interpretation
      – We interpret the pulse width in Figure 5-8 (10 µs, 100 µs, 1 ms) as single-pulse conditions, not for repetitive operation.
      – For repetitive switching, we believe the correct approach is to first ensure each stress event falls within the single-pulse SOA, and then use measured overlap energy (E_pulse), conduction loss, and transient thermal impedance Zθ to verify Tj < TJ,max. Is this the recommended evaluation method?

    3. Request for example
      – Based on the above operating conditions, could you kindly provide an example calculation on how to evaluate whether operation remains within the SOA (e.g. how to estimate overlap time, calculate E_pulse, reference Zθ, and check margin)?

    Thanks,

    Conor