We are trying to understand the following tables in the AM180x datasheet for the DDR2 controller and if there are possible descrepencies:
The SDTIMR2 configuration register shown in Table 14-20 (page 335) and Table 14-28 (page 344). 
For the examples in Table 14-20:
1. T_RTP should have a register value of 2 (not 1). This would be calculated as CEILING(15ns x 150MHz) - 1 = CEILING(2.25) - 1 = 2. It is the same calculation as T_RP, T_RCD, and T_WR in Table 14-19 and thus should be any different.
2. Similarly, T_XSNR should have a register value of 20 (not 18). This is calculated as CEILING(137.5ns x 150MHz) - 1 = CEILING(20.625) - 1 = 20.
3. T_RASMAX should have a register value of 7 (not 8). This is calculated as FLOOR(70us / 7.8us) - 1 = FLOOR(8.974) - 1 = 7. T_RASMAX is the only field in Table 14-28 where it says to round down instead of up (only max value rather than min value).
I think I'm correct about what these settings should be, but I want to make sure so we don't see any random memory errors.
