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[FAQ] TDA4VH: Verifying DDR Configuration Using CCS

Part Number: TDA4VH
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi,
How can I confirm whether DDR is configured properly using CCS?

  • Hi,

    This FAQ explains how to verify DDR configuration by writing and validating directly to DDR memory through the CCS Memory Browser, without loading any application binary. If you are able to successfully write to and validate from DDR, you can confirm that DDR has been configured correctly.

    The following steps apply to J784S4, J721S2, and J721E EVMs.

    Prerequisite:
    1.Please refer to the FAQ on DDR Register Configuration setup for custom boards before proceeding.

    2.A proper GEL file update is required for CCS to work with DDR.

     You can find the TDA4 EVM GEL files at:

     <CCS_root_folder>/ccs/ccs_base/emulation/gel/J784S4_TDA4VH/J7AHP_DDR_SI/Configs/J784S4-DDR-EVM-LP4-DDRSS0-Only.gel

    Once DDRSS register configuration is completed, SysConfig will generate a new file J784S4-DDR-EVM-LP4.gel.

    Replace this generated custom GEL file in your CCS configuration in place of the default J784S4-DDR-EVM-LP4-DDRSS0-Only.gel file.


    Steps to Verify DDR Configuration:

    Please refer to the [CCS Target Configuration Setup Guide] for details on creating and setting up your CCS target configuration.

    Step 1: Launch Target Configuration

    Open Code Composer Studio (CCS)

    Go to View → Target Configurations

    Right-click on the desired target configuration and select Launch Selected Configuration.

    Step 2: Load DMSC Initialization Script

    Open the Scripting Console in CCS: View → Scripting Console

    Load the SoC-specific initialization script (update the path as required for your setup)

    loadJSFile("/ti/j7/workarea/pdk/packages/ti/drv/sciclient/tools/ccsLoadDmsc/<soc>/launch.js");

    Note:
    Keep the CCS connection active to the MCU_R5_0 core while performing DDR memory write operations. Disconnecting this core may cause DDR configuration to be lost, resulting in incorrect behavior in the Memory Browser.

    Step 3: Write and validate from DDR Using Memory Browser

    Open the Memory Browser in CCS: View → Memory Browser

    Enter the DDR start address: 0x80000000

    Right-click inside the Memory Browser and select Fill Memory.

    In the Fill Memory window:

    Set the Start Address to 0x80000000

    Enter the Length, Data Value, and validate Type/Size

    Click OK.

    Step 4:

    The Memory Browser will show the data written into DDR

    Modify the memory region to confirm that the values persist as expected

    If data is written and validate back correctly, DDR is configured properly.

    Regards,

    Karthik