Tool/software:
Hello E2E,
I am inquiring on how to implement the AM5716AABCXEA processor with DDR3L ECC memory.
Errata i922 contains some information, however I am seeking a detailed design process when using memory with ECC.
I am uncertain if ECC can be fully utilized with the AM5716 processor.
Please forward any application notes on ECC implementation, including schematics, if they are available.
I need to know how to handle the ERR signals, and usage of I2C or MR3 register reads, and more importantly, EMIF interface signal connection.
Our current configuration is using 2x DDR3L (16bit wide), for 32bit wide bus. IC is Micron MT41K256M16TW-107 AUT:P. ECC is not available with this part.
I would like to change to ISSI part IS46TR16256ECL-125LBxLA3, with ECC.
Package with B2 has ERR signal and I2C interface, B3 has ERR signal and accesses ECC via MR3 register, and B4 eliminated ERR signal and has I2C interface.
Thank you for your support,
David
