TDA4VE-Q1: Subject: TDA4 SPI clock configuration issue

Part Number: TDA4VE-Q1

Tool/software:

Dear TI Support Team,

1. Our Issues

  1. We are using the TDA4 SoC and encountered a problem with the SPI clock. When the reference clock is set to 125 MHz, using spidev_test -s 15000000 to configure the SPI clock, the actual measured frequency is always about 1/3 of the expected value. For example, when setting 15 MHz, the measured frequency is about 5 MHz. We are not clear how the SPI clock is actually derived. Could you please clarify?

  2. Why can we assign almost any clock as the SPI reference clock? For example, even if we configure a USB-related clock in the device tree, SPI still works. Why is that possible?

  3. We would like to configure a 20 MHz SPI clock. However, based on the documentation, only 50 MHz, 25 MHz, 16.6 MHz, and 12.5 MHz seem available. Is it true that 20 MHz is not supported? Or is there a way to generate 20 MHz?


2. Our Work and Observations

Case 1: Reference clock = 125 MHz
Device tree:

main_spi0: spi@2100000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x02100000 0x00 0x400>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 339 1>;
status = "disabled";
};

We manually modified spi-omap2-mcspi.c (omap2_mcspi_setup_transfer) and measured the clock on the oscilloscope. The calculation was:

div = (ref_clk_hz + speed_hz - 1) / speed_hz; speed_hz = ref_clk_hz / div; clkd = (div - 1) & 0xf; extclk = (div - 1) >> 4; clkg = OMAP2_MCSPI_CHCONF_CLKG;

The results show that the actual clock is always about 1/3 of the expected speed.


Case 2: Reference clock = 50 MHz
Device tree:

main_spi0: spi@2100000 {
compatible = "ti,am654-mcspi","ti,omap4-mcspi";
reg = <0x00 0x02100000 0x00 0x400>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 339 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 339 2>;
status = "disabled";
};

Again, we manually modified the same driver function and used the same calculation method. The oscilloscope confirmed the same mismatch issue.


Summary:

  • The SPI output clock is always about 1/3 of the requested frequency.

  • We don’t understand why any arbitrary reference clock source can be assigned and still work.

  • We want to know if 20 MHz is achievable, or if only the listed clock frequencies are supported.

Could you please help clarify how SPI clock generation works on TDA4 and whether our observations are expected behavior?

Thanks a lot.