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Part Number: J721EXCPXEVM
Tool/software:
Hi,
We are using the J721EXCPXEVM with the J7200XSOMXEVM for our proyect development.
We would like to know if it is possible to use the WKUP-UART0 to print all the boot logs and the u-boot terminar and also the terminal of linux. What are the steps to configure this?
I would like to use this wkup-uart in the way the MAIN-UART0 is alredy configured.
Im using the ti-processor-sdk-linux-j7200-evm-11_00_10_01.
Hi Santiago,
Can you try the below patch :
diff --git a/arch/arm/mach-k3/r5/j7200/clk-data.c b/arch/arm/mach-k3/r5/j7200/clk-data.c
index eb8436de..b95d4435 100644
--- a/arch/arm/mach-k3/r5/j7200/clk-data.c
+++ b/arch/arm/mach-k3/r5/j7200/clk-data.c
@@ -62,6 +62,17 @@ static const char * const wkup_i2c0_mcupll_bypass_clksel_out0_parents[] = {
"gluelogic_hfosc0_clkout",
};
+static const char * const wkupusart_clk_sel_out0_parents[] = {
+ "hsdiv4_16fft_mcu_1_hsdivout3_clk",
+ "postdiv2_16fft_main_1_hsdivout5_clk",
+};
+
+static const char * const wkup_usart_mcupll_bypass_clksel_out0_parents[] = {
+ "wkupusart_clk_sel_out0",
+ "gluelogic_hfosc0_clkout",
+};
+
+
static const char * const main_pll_hfosc_sel_out0_parents[] = {
"gluelogic_hfosc0_clkout",
"board_0_hfosc1_clk_out",
@@ -419,6 +430,8 @@ static const struct clk_data clk_list[] = {
CLK_DIV("osbclk0_div_out0", "obsclk0_mux_out0", 0x108000, 8, 8, 0, 0),
CLK_DIV("k3_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "k3_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0),
CLK_DIV("k3_pll_ctrl_wrap_wkup_0_chip_div24_clk_clk", "k3_pll_ctrl_wrap_wkup_0_sysclkout_clk", 0x4201011c, 0, 5, 0, 0),
+CLK_MUX("wkupusart_clk_sel_out0", wkupusart_clk_sel_out0_parents, 2, 0x43008064, 0, 1, 0),
+ CLK_MUX("wkup_usart_mcupll_bypass_clksel_out0", wkup_usart_mcupll_bypass_clksel_out0_parents, 2, 0x43008060, 0, 1, 0),
};
static const struct dev_clk soc_dev_clk_data[] = {
@@ -554,6 +567,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(323, 0, "main_pll8_sel_extwave_out0"),
DEV_CLK(323, 1, "pllfracf_ssmod_16fft_main_8_foutvcop_clk"),
DEV_CLK(323, 2, "hsdiv0_16fft_main_8_hsdivout0_clk"),
+ DEV_CLK(287, 2, "wkup_usart_mcupll_bypass_clksel_out0"),
+ DEV_CLK(287, 3, "wkupusart_clk_sel_out0"),
+ DEV_CLK(287, 4, "gluelogic_hfosc0_clkout"),
+ DEV_CLK(287, 5, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
};
const struct ti_k3_clk_platdata j7200_clk_platdata = {
diff --git a/arch/arm/mach-k3/r5/j7200/dev-data.c b/arch/arm/mach-k3/r5/j7200/dev-data.c
index 8ce6796f..ae24e573 100644
--- a/arch/arm/mach-k3/r5/j7200/dev-data.c
+++ b/arch/arm/mach-k3/r5/j7200/dev-data.c
@@ -69,6 +69,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(103, &soc_lpsc_list[14]),
PSC_DEV(104, &soc_lpsc_list[15]),
PSC_DEV(102, &soc_lpsc_list[16]),
+ PSC_DEV(287, &soc_lpsc_list[13]),
};
const struct ti_k3_pd_platdata j7200_pd_platdata = {
diff --git a/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts b/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
index 735ffd3f..2823ff13 100644
--- a/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
+++ b/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
@@ -18,9 +18,9 @@
model = "Texas Instruments J7200 EVM";
aliases {
- serial0 = &wkup_uart0;
+ serial0 = &main_uart0;
serial1 = &mcu_uart0;
- serial2 = &main_uart0;
+ serial2 = &wkup_uart0;
serial3 = &main_uart1;
serial5 = &main_uart3;
mmc0 = &main_sdhci0;
@@ -270,7 +270,7 @@
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
- status = "reserved";
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
bootph-all;
diff --git a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
index d9a40b48..c24b1c8f 100644
--- a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
@@ -274,11 +274,10 @@
compatible = "ti,j721e-uart", "ti,am654-uart";
reg = <0x00 0x42300000 0x00 0x100>;
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <48000000>;
+ clock-frequency = <96000000>;
power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 287 2>;
clock-names = "fclk";
- status = "disabled";
};
mcu_uart0: serial@40a00000 {
Regards
Gokul
Hi Gokul,
Sorry for the delay, for compiling these DTS do i have to do 'make u-boot' ? or it is 'make linux-dtbs'?
im kind of confused becouse i found that the files that are in board-support/ti-u-boot-2025.01+git/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts are the same that the one are in board-support/ti-linux-kernel-6.12.17+git-ti/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts.
So if i want to change the uart where i print all the boot logs, should i change this both files and compile device tree for uboot and device tree for kernel?
Futhermore, where is this device tree loading before u-boot? is the responsability of tiboot3.bin? o tispl.bin?
Thanks for the help.
Hi Santiago,
Sorry for the delay, for compiling these DTS do i have to do 'make u-boot' ? or it is 'make linux-dtbs'?
you will have to use "make u-boot".
So if i want to change the uart where i print all the boot logs, should i change this both files and compile device tree for uboot and device tree for kernel?
This just changes the uart for R5 SPL, A72SPL and uboot. We will move to linux kernel once we confirm that it is working in SPL and UBOOT.
Regards
Gokul
Hi Gokul,
I applied the modifications you suggested, but apparently, it's not working at all. When booting the EVM, I can see the following output in the WKUP UART0:
U-Boot SPL 2025.01-ti-g70667128cb5b-dirty (Sep 12 2025 - 12:23:41 +0200) SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.9--v11.00.09+ (Fancy Rat)') Trying to boot from MMC1 Skipping authentication on GP device Skipping authentication on GP device Skipping authentication on GP device Skipping authentication on GP device Skipping authentication on GP device Loading Environment from nowhere... OK init_env from device 17 not supported! Starting ATF on ARM64 core...
After this, nothing else is displayed, and it seems like the boot process is not progressing any further. It looks like it gets stuck at this point indefinitely.
Are these logs coming from the R5 SPL? Could it be that the system is stuck here?
How can we enable more detailed logs to understand what is failing?
Could this issue be related to the tiboot3.bin file, or is it possible that the tispl.bin is not loading correctly, causing the A72 SPL not to run properly?
The path of the files edited were the following:
- /ti-processor-sdk-linux-j7200-evm-11_00_10_01/board-support/ti-u-boot-2025.01+git/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
- /ti-processor-sdk-linux-j7200-evm-11_00_10_01/board-support/ti-u-boot-2025.01+git/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
- /ti-processor-sdk-linux-j7200-evm-11_00_10_01/board-support/ti-u-boot-2025.01+git/arch/arm/mach-k3/r5/j7200/dev-data.c
- /board-support/ti-u-boot-2025.01+git/arch/arm/mach-k3/r5/j7200/clk-data.c
Thanks for the help.
Hi Santiago,
Can you add these changes as wellin addition to the previous changes made :
U-BOOT folder
diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
index 54cffa52..37214c3c 100644
--- a/board/ti/j721e/j721e.env
+++ b/board/ti/j721e/j721e.env
@@ -14,7 +14,7 @@ defined(CONFIG_TARGET_J721E_R5_EVM)
name_kern=Image
console=ttyS2,115200n8
-args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x42300000
${mtdparts}
run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
ATF changes:
diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h index 6a05392ad..8a463ba05 100644 --- a/plat/ti/k3/include/platform_def.h +++ b/plat/ti/k3/include/platform_def.h @@ -90,14 +90,14 @@ /* Platform default console definitions */ #ifndef K3_USART_BASE -#define K3_USART_BASE (0x02800000 + 0x10000 * K3_USART) +#define K3_USART_BASE 0x42300000 #endif /* USART has a default size for address space */ #define K3_USART_SIZE 0x1000 #ifndef K3_USART_CLK_SPEED -#define K3_USART_CLK_SPEED 48000000 +#define K3_USART_CLK_SPEED 96000000 #endif /* Crash console defaults */
OPTEE OS Changes:
diff --git a/core/arch/arm/plat-k3/platform_config.h b/core/arch/arm/plat-k3/platform_config.h index cffca0a07..d15f9a08f 100644 --- a/core/arch/arm/plat-k3/platform_config.h +++ b/core/arch/arm/plat-k3/platform_config.h @@ -9,11 +9,11 @@ #include <mm/generic_ram_layout.h> -#define UART0_BASE 0x02800000 +#define UART0_BASE 0x42300000 -#define CONSOLE_UART_BASE (UART0_BASE + CFG_CONSOLE_UART * 0x10000) +#define CONSOLE_UART_BASE UART0_BASE #define CONSOLE_BAUDRATE 115200 -#define CONSOLE_UART_CLK_IN_HZ 48000000 +#define CONSOLE_UART_CLK_IN_HZ 96000000 #define DRAM0_BASE 0x80000000 #define DRAM0_SIZE 0x80000000 diff --git a/mk/clang.mk b/mk/clang.mk index d08b26e6f..8a01cd9db 100644 --- a/mk/clang.mk +++ b/mk/clang.mk @@ -31,7 +31,7 @@ comp-cflags-warns-clang := -Wno-language-extension-token \ # Note, use the compiler runtime library (libclang_rt.builtins.*.a) instead of # libgcc for clang -libgcc$(sm) := $(shell $(CC$(sm)) $(CFLAGS$(arch-bits-$(sm))) \ +libgcc$(sm) := $(shell $(CC$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CFLAGS$(arch-bits-$(sm))) \ -rtlib=compiler-rt -print-libgcc-file-name 2> /dev/null) # Core ASLR relies on the executable being ready to run from its preferred load
Regards
Gokul
Hi Gokul,
I'm still stuck at the R5 SPL stage after applying all the changes you suggested. It seems like the boot process isn’t progressing correctly to the next steps.
Just to confirm, after making these changes I rebuilt everything using make u-boot from the top-level folder. Then, from board-support/ti-u-boot-2025.01+git/build, I took the following files:
tiboot3.bin
tispl.bin
u-boot.img
I copied these files into the boot0 partition of the eMMC. My understanding is that it should then start printing the boot logs to WKUP-UART0 after reset, just like it does to MAIN-UART0.
Our goal is to use this UART as the primary interface for boot logs, since it’s the first UART available during the boot sequence. This would allow us to capture and diagnose any potential failures that occur as early as possible in the boot process.
Hi Santiago ,
You will have to rebuild ATF as well using the below steps:
Regards
Gokul
Hi Gokul,
I followed the steps you recommended, and it works!
Now all the logs are shown on WKUP_UART0.
Here are the logs I get:
U-Boot SPL 2025.01-ti-gac2433f99366-dirty (Sep 25 2025 - 18:00:12 +0200) SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.9--v11.00.09+ (Fancy Rat)') Trying to boot from MMC1 Skipping authentication on GP device Skipping authentication on GP device Skipping authentication on GP device Skipping authentication on GP device Skipping authentication on GP device Loading Environment from nowhere... OK init_env from device 17 not supported! Starting ATF on ARM64 core... NOTICE: BL31: v2.12.0(release):11.00.09-dirty NOTICE: BL31: Built : 15:57:31, Sep 25 2025 U-Boot SPL 2025.01-ti-gac2433f99366-dirty (Sep 25 2025 - 17:59:40 +0200) SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.9--v11.00.09+ (Fancy Rat)') Detected: J7X-BASE-CPB rev A Detected: J7X-VSC8514-ETH rev E2 Trying to boot from MMC1 Skipping authentication on GP device Skipping authentication on GP device U-Boot 2025.01-ti-gac2433f99366-dirty (Sep 25 2025 - 17:59:40 +0200) SoC: J7200 SR2.0 GP Model: Texas Instruments J7200 EVM Board: J7200X-PM2-SOM rev E8 DRAM: 2 GiB (total 4 GiB) Core: 109 devices, 33 uclasses, devicetree: separate Flash: 0 Bytes MMC: mmc@4f80000: 0, mmc@4fb0000: 1 Loading Environment from nowhere... OK In: serial@42300000 Out: serial@42300000 Err: serial@42300000 am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6B A82102 ale_ver: 0x00293904 Ports:1 Detected: J7X-BASE-CPB rev A Detected: J7X-VSC8514-ETH rev E2 Net: eth0: ethernet@46000000port@1 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0(part 0) is current device SD/MMC found on device 0 Can't set block device gpio: pin gpio@22_17 (gpio 126) value is 1 gpio: pin gpio@22_16 (gpio 125) value is 0 k3_r5f_rproc r5f@41000000: Core 1 is already in use. No rproc commands work 75832 bytes read in 3 ms (24.1 MiB/s) Load Remote Processor 1 with data@addr=0x82000000 75832 bytes: Success! 75704 bytes read in 3 ms (24.1 MiB/s) Load Remote Processor 2 with data@addr=0x82000000 75704 bytes: Success! 75704 bytes read in 3 ms (24.1 MiB/s) Load Remote Processor 3 with data@addr=0x82000000 75704 bytes: Success! 22256128 bytes read in 83 ms (255.7 MiB/s) 80995 bytes read in 2 ms (38.6 MiB/s) Working FDT set to 88000000 3263 bytes read in 1 ms (3.1 MiB/s) ## Flattened Device Tree blob at 88000000 Booting using the fdt blob at 0x88000000 Working FDT set to 88000000 Loading Device Tree to 000000008fee9000, end 000000008fffffff ... OK Working FDT set to 8fee9000 Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd080] [ 0.000000] Linux version 6.12.17-ti-00773-gcdcaeac783e3 (oe-user@oe-host) (aarch64-oe-linux-gcc (GCC) 13.3.0, GNU ld (GNU Binutils) 2.42.0.20240723) #1 SMP PREEMPT Thu Apr 3 17:42:36 UTC 2025 [ 0.000000] KASLR disabled due to lack of seed [ 0.000000] Machine model: Texas Instruments J7200 EVM [ 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000042300000 (options '') [ 0.000000] printk: legacy bootconsole [ns16550a0] enabled [ 0.000000] efi: UEFI not found. [ 0.000000] OF: reserved mem: 0x000000009e800000..0x000000009fffffff (24576 KiB) nomap non-reusable optee@9e800000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a0000000, com patible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a0000000..0x00000000a00fffff (1024 KiB) nomap non-reusable r5f-dma-memory@a0000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB [ 0.000000] OF: reserved mem: initialized node r5f-memory@a0100000, compati ble id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a0100000..0x00000000a0ffffff (15360 KiB) nomap non-reusable r5f-memory@a0100000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a1000000, com patible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a1000000..0x00000000a10fffff (1024 KiB) nomap non-reusable r5f-dma-memory@a1000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB [ 0.000000] OF: reserved mem: initialized node r5f-memory@a1100000, compati ble id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a1100000..0x00000000a1ffffff (15360 KiB) nomap non-reusable r5f-memory@a1100000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a2000000, com patible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a2000000..0x00000000a20fffff (1024 KiB) nomap non-reusable r5f-dma-memory@a2000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 15 MiB [ 0.000000] OF: reserved mem: initialized node r5f-memory@a2100000, compati ble id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a2100000..0x00000000a2ffffff (15360 KiB) nomap non-reusable r5f-memory@a2100000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB [ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@a3000000, com patible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a3000000..0x00000000a30fffff (1024 KiB) nomap non-reusable r5f-dma-memory@a3000000 [ 0.000000] Reserved memory: created DMA memory pool at 0x00000000a3100000, size 15 MiB [ 0.000000] OF: reserved mem: initialized node r5f-memory@a3100000, compati ble id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000a3100000..0x00000000a3ffffff (15360 KiB) nomap non-reusable r5f-memory@a3100000 [ 0.000000] OF: reserved mem: 0x00000000a4000000..0x00000000a47fffff (8192 KiB) nomap non-reusable ipc-memories@a4000000 [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000080000000-0x00000000ffffffff] [ 0.000000] DMA32 empty [ 0.000000] Normal [mem 0x0000000100000000-0x00000008ffffffff] [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000080000000-0x000000009e7fffff] [ 0.000000] node 0: [mem 0x000000009e800000-0x00000000a47fffff] [ 0.000000] node 0: [mem 0x00000000a4800000-0x00000000ffffffff] [ 0.000000] node 0: [mem 0x0000000880000000-0x00000008ffffffff] [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000008ffffffff ] [ 0.000000] cma: Reserved 32 MiB at 0x00000000fe000000 on node -1 [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.1 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.5 [ 0.000000] percpu: Embedded 22 pages/cpu s51672 r8192 d30248 u90112 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] CPU features: detected: GIC system register CPU interface [ 0.000000] CPU features: detected: Spectre-v3a [ 0.000000] CPU features: detected: Spectre-BHB [ 0.000000] CPU features: detected: ARM erratum 1742098 [ 0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,m mio32,0x42300000 mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m( ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.roo tfs);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k( hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs) root=PARTUUID=40929437-554c-49ab-a5 ef-4c59acb8fce6 rw rootfstype=ext4 rootwait [ 0.000000] Unknown kernel command line parameters "mtdparts=47040000.spi.0 :512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.en v.backup),1m(ospi.sysfw),-@8m(ospi.rootfs);47034000.hyperbus:512k(hbmc.tiboot3 ),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootf s)", will be passed to user space. [ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 byt es, linear) [ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes , linear) [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1048576 [ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off [ 0.000000] software IO TLB: area num 2. [ 0.000000] software IO TLB: mapped [mem 0x00000000fa000000-0x00000000fe000 000] (64MB) [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 [ 0.000000] rcu: Preemptible hierarchical RCU implementation. [ 0.000000] rcu: RCU event tracing is enabled. [ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=2. [ 0.000000] Trampoline variant of Tasks RCU enabled. [ 0.000000] Tracing variant of Tasks RCU enabled. [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 j iffies. [ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2 [ 0.000000] RCU Tasks: Setting shift to 1 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=2. [ 0.000000] RCU Tasks Trace: Setting shift to 1 and lim to 1 rcu_task_cb_ad just=1 rcu_task_cpu_ids=2. [ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 [ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode [ 0.000000] GICv3: 960 SPIs implemented [ 0.000000] GICv3: 0 Extended SPIs implemented [ 0.000000] Root IRQ handler: gic_handle_irq [ 0.000000] GICv3: GICv3 features: 16 PPIs [ 0.000000] GICv3: GICD_CTRL.DS=0, SCR_EL3.FIQ=0 [ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001900000 [ 0.000000] ITS [mem 0x01820000-0x0182ffff] [ 0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS [ 0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20- >19 [ 0.000000] ITS@0x0000000001820000: allocated 524288 Devices @880800000 (fl at, esz 8, psz 64K, shr 0) [ 0.000000] ITS: using cache flushing for cmd queue [ 0.000000] GICv3: using LPI property table @0x0000000880040000 [ 0.000000] GIC: using cache flushing for LPI property table [ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000880050 000 [ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. [ 0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys). [ 0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycl es: 0x2e2049d3e8, max_idle_ns: 440795210634 ns [ 0.000000] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 439 8046511102ns [ 0.008425] Console: colour dummy device 80x25 [ 0.012992] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000) [ 0.023664] pid_max: default: 32768 minimum: 301 [ 0.028425] LSM: initializing lsm=capability,selinux [ 0.033533] SELinux: Initializing. [ 0.037394] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, li near) [ 0.044971] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 byte s, linear) [ 0.069227] rcu: Hierarchical SRCU implementation. [ 0.074135] rcu: Max phase no-delay instances is 1000. [ 0.079607] Timer migration: 1 hierarchy levels; 8 children per group; 1 cr ossnode level [ 0.088179] EFI services will not be available. [ 0.092942] smp: Bringing up secondary CPUs ... [ 0.098112] Detected PIPT I-cache on CPU1 [ 0.098169] GICv3: CPU1: found redistributor 1 region 0:0x0000000001920000 [ 0.098184] GICv3: CPU1: using allocated LPI pending table @0x0000000880060 000 [ 0.098220] CPU1: Booted secondary processor 0x0000000001 [0x411fd080] [ 0.098311] smp: Brought up 1 node, 2 CPUs [ 0.127662] SMP: Total of 2 processors activated. [ 0.132466] CPU: All CPU(s) started at EL2 [ 0.136655] CPU features: detected: 32-bit EL0 Support [ 0.141906] CPU features: detected: CRC32 instructions [ 0.147179] alternatives: applying system-wide alternatives [ 0.153156] Memory: 3886032K/4194304K available (12928K kernel code, 1254K rwdata, 4644K rodata, 2752K init, 639K bss, 267404K reserved, 32768K cma-reser ved) [ 0.168114] devtmpfs: initialized [ 0.176878] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns [ 0.186857] futex hash table entries: 512 (order: 3, 32768 bytes, linear) [ 0.194303] 27152 pages in range for non-PLT usage [ 0.194309] 518672 pages in range for PLT usage [ 0.199359] pinctrl core: initialized pinctrl subsystem [ 0.209687] DMI not present or invalid. [ 0.215489] NET: Registered PF_NETLINK/PF_ROUTE protocol family [ 0.222101] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocation s [ 0.229425] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic al locations [ 0.237470] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations [ 0.245603] audit: initializing netlink subsys (disabled) [ 0.251261] audit: type=2000 audit(0.160:1): state=initialized audit_enable d=0 res=1 [ 0.251487] thermal_sys: Registered thermal governor 'step_wise' [ 0.259184] thermal_sys: Registered thermal governor 'power_allocator' [ 0.265346] cpuidle: using governor menu [ 0.276123] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. [ 0.283091] ASID allocator initialised with 65536 entries [ 0.292200] /bus@100000/interrupt-controller@1800000: Fixed dependency cycl e(s) with /bus@100000/interrupt-controller@1800000 [ 0.311038] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages [ 0.317990] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page [ 0.324394] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages [ 0.331329] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page [ 0.337733] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages [ 0.344667] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page [ 0.351071] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages [ 0.358004] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page [ 0.365449] k3-chipinfo 43000014.chipid: Family:J7200 rev:SR2.0 JTAGID[0x1b b6d02f] Detected [ 0.378014] iommu: Default domain type: Translated [ 0.382914] iommu: DMA domain TLB invalidation policy: strict mode [ 0.389394] SCSI subsystem initialized [ 0.393418] usbcore: registered new interface driver usbfs [ 0.399041] usbcore: registered new interface driver hub [ 0.404483] usbcore: registered new device driver usb [ 0.409934] pps_core: LinuxPPS API ver. 1 registered [ 0.415008] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Gio metti <giometti@linux.it> [ 0.424347] PTP clock support registered [ 0.428370] EDAC MC: Ver: 3.0.0 [ 0.431756] scmi_core: SCMI protocol bus registered [ 0.436903] FPGA manager framework [ 0.440429] Advanced Linux Sound Architecture Driver Initialized. [ 0.447124] vgaarb: loaded [ 0.450069] clocksource: Switched to clocksource arch_sys_counter [ 0.456470] VFS: Disk quotas dquot_6.6.0 [ 0.460496] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) [ 0.471388] NET: Registered PF_INET protocol family [ 0.476673] IP idents hash table entries: 65536 (order: 7, 524288 bytes, li near) [ 0.485769] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32 768 bytes, linear) [ 0.494547] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes , linear) [ 0.502473] TCP established hash table entries: 32768 (order: 6, 262144 byt es, linear) [ 0.510706] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, li near) [ 0.519431] TCP: Hash tables configured (established 32768 bind 32768) [ 0.526277] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear) [ 0.533205] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linea r) [ 0.540647] NET: Registered PF_UNIX/PF_LOCAL protocol family [ 0.546807] RPC: Registered named UNIX socket transport module. [ 0.552872] RPC: Registered udp transport module. [ 0.557677] RPC: Registered tcp transport module. [ 0.562480] RPC: Registered tcp-with-tls transport module. [ 0.568085] RPC: Registered tcp NFSv4.1 backchannel transport module. [ 0.574676] NET: Registered PF_XDP protocol family [ 0.579582] PCI: CLS 0 bytes, default 64 [ 0.584336] Initialise system trusted keyrings [ 0.589016] workingset: timestamp_bits=46 max_order=20 bucket_order=0 [ 0.595799] squashfs: version 4.0 (2009/01/31) Phillip Lougher [ 0.601929] NFS: Registering the id_resolver key type [ 0.607120] Key type id_resolver registered [ 0.611395] Key type id_legacy registered [ 0.615504] nfs4filelayout_init: NFSv4 File Layout Driver Registering... [ 0.622353] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registeri ng... [ 0.651350] Key type asymmetric registered [ 0.655540] Asymmetric key parser 'x509' registered [ 0.660557] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 244) [ 0.668234] io scheduler mq-deadline registered [ 0.672871] io scheduler kyber registered [ 0.676988] io scheduler bfq registered [ 0.682948] pinctrl-single 4301c000.pinctrl: 13 pins, size 52 [ 0.688953] pinctrl-single 4301c038.pinctrl: 2 pins, size 8 [ 0.694773] pinctrl-single 4301c068.pinctrl: 59 pins, size 236 [ 0.701026] pinctrl-single 4301c174.pinctrl: 8 pins, size 32 [ 0.706984] pinctrl-single 104200.pinctrl: 20 pins, size 80 [ 0.712758] pinctrl-single 104280.pinctrl: 8 pins, size 32 [ 0.718474] pinctrl-single 11c000.pinctrl: 67 pins, size 268 [ 0.724567] pinctrl-single 11c110.pinctrl: 1 pins, size 4 [ 0.730172] pinctrl-single 11c11c.pinctrl: 3 pins, size 12 [ 0.735869] pinctrl-single 11c164.pinctrl: 2 pins, size 8 [ 0.741948] ledtrig-cpu: registered to indicate activity on CPUs [ 0.751417] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled [ 0.762480] loop: module loaded [ 0.766361] megasas: 07.727.03.00-rc1 [ 0.772141] tun: Universal TUN/TAP device driver, 1.6 [ 0.777955] VFIO - User Level meta-driver version: 0.3 [ 0.783900] usbcore: registered new interface driver usb-storage [ 0.790460] i2c_dev: i2c /dev entries driver [ 0.795536] sdhci: Secure Digital Host Controller Interface driver [ 0.801871] sdhci: Copyright(c) Pierre Ossman [ 0.806455] sdhci-pltfm: SDHCI platform and OF driver helper [ 0.812619] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping .... [ 0.819653] usbcore: registered new interface driver usbhid [ 0.825349] usbhid: USB HID core driver [ 0.829939] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 (0,8 000003f) counters available [ 0.839796] optee: probing for conduit method. [ 0.844347] optee: api uid mismatch [ 0.847914] optee firmware:optee: probe with driver optee failed with error -22 [ 0.856854] Initializing XFRM netlink socket [ 0.861256] NET: Registered PF_PACKET protocol family [ 0.866475] Key type dns_resolver registered [ 0.874873] registered taskstats version 1 [ 0.879307] Loading compiled-in X.509 certificates [ 0.891783] ti-sci 44083000.system-controller: ABI: 4.0 (firmware rev 0x000 b '11.0.9--v11.00.09+ (Fancy Rat)') [ 0.971803] omap_i2c 42120000.i2c: bus 0 rev0.12 at 400 kHz [ 0.978511] pca953x 1-0021: supply vcc not found, using dummy regulator [ 0.985349] pca953x 1-0021: using no AI [ 1.002557] pca953x 1-0020: supply vcc not found, using dummy regulator �� K3(8V�K���ŷ��� LK.m� �;������%h4-3֠Ʌ"�"-���Ÿ-5� LK.m� �;�� �����%h����!� )� !ĕ�K�
Do i have to follow same steps as we have done in:
- upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
-upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
but this time in the kernel folder?
Thanks.
Hi Santiago,
Do i have to follow same steps as we have done in:
- upstream/src/arm64/ti/k3-j7200-common-proc-board.dts-upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
but this time in the kernel folder?
Yes, the same changes have to be applied in the kernel folder and these files are present in the (<kernel folder>/arch/arm64/boot/dts/ti) folder.
Can you also share the patch applied on the linux kernel once you done and tested it.
Regards
Gokul
Hi Gokul,
Al get working the WKUP_UART for the linux terminal.
Here are the changes done applied to the kernel:
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 735ffd3f3..2823ff137 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -18,9 +18,9 @@ / {
model = "Texas Instruments J7200 EVM";
aliases {
- serial0 = &wkup_uart0;
+ serial0 = &main_uart0;
serial1 = &mcu_uart0;
- serial2 = &main_uart0;
+ serial2 = &wkup_uart0;
serial3 = &main_uart1;
serial5 = &main_uart3;
mmc0 = &main_sdhci0;
@@ -270,7 +270,7 @@ J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
- status = "reserved";
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
bootph-all;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index d9a40b480..c24b1c8f2 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -274,11 +274,10 @@ wkup_uart0: serial@42300000 {
compatible = "ti,j721e-uart", "ti,am654-uart";
reg = <0x00 0x42300000 0x00 0x100>;
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <48000000>;
+ clock-frequency = <96000000>;
power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 287 2>;
clock-names = "fclk";
- status = "disabled";
};
mcu_uart0: serial@40a00000 {
I let below the full patch with all the changes needed:
diff --git a/arch/arm/mach-k3/r5/j7200/clk-data.c b/arch/arm/mach-k3/r5/j7200/clk-data.c
index eb8436de..b95d4435 100644
--- a/arch/arm/mach-k3/r5/j7200/clk-data.c
+++ b/arch/arm/mach-k3/r5/j7200/clk-data.c
@@ -62,6 +62,17 @@ static const char * const wkup_i2c0_mcupll_bypass_clksel_out0_parents[] = {
"gluelogic_hfosc0_clkout",
};
+static const char * const wkupusart_clk_sel_out0_parents[] = {
+ "hsdiv4_16fft_mcu_1_hsdivout3_clk",
+ "postdiv2_16fft_main_1_hsdivout5_clk",
+};
+
+static const char * const wkup_usart_mcupll_bypass_clksel_out0_parents[] = {
+ "wkupusart_clk_sel_out0",
+ "gluelogic_hfosc0_clkout",
+};
+
+
static const char * const main_pll_hfosc_sel_out0_parents[] = {
"gluelogic_hfosc0_clkout",
"board_0_hfosc1_clk_out",
@@ -419,6 +430,8 @@ static const struct clk_data clk_list[] = {
CLK_DIV("osbclk0_div_out0", "obsclk0_mux_out0", 0x108000, 8, 8, 0, 0),
CLK_DIV("k3_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "k3_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0),
CLK_DIV("k3_pll_ctrl_wrap_wkup_0_chip_div24_clk_clk", "k3_pll_ctrl_wrap_wkup_0_sysclkout_clk", 0x4201011c, 0, 5, 0, 0),
+CLK_MUX("wkupusart_clk_sel_out0", wkupusart_clk_sel_out0_parents, 2, 0x43008064, 0, 1, 0),
+ CLK_MUX("wkup_usart_mcupll_bypass_clksel_out0", wkup_usart_mcupll_bypass_clksel_out0_parents, 2, 0x43008060, 0, 1, 0),
};
static const struct dev_clk soc_dev_clk_data[] = {
@@ -554,6 +567,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(323, 0, "main_pll8_sel_extwave_out0"),
DEV_CLK(323, 1, "pllfracf_ssmod_16fft_main_8_foutvcop_clk"),
DEV_CLK(323, 2, "hsdiv0_16fft_main_8_hsdivout0_clk"),
+ DEV_CLK(287, 2, "wkup_usart_mcupll_bypass_clksel_out0"),
+ DEV_CLK(287, 3, "wkupusart_clk_sel_out0"),
+ DEV_CLK(287, 4, "gluelogic_hfosc0_clkout"),
+ DEV_CLK(287, 5, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
};
const struct ti_k3_clk_platdata j7200_clk_platdata = {
diff --git a/arch/arm/mach-k3/r5/j7200/dev-data.c b/arch/arm/mach-k3/r5/j7200/dev-data.c
index 8ce6796f..ae24e573 100644
--- a/arch/arm/mach-k3/r5/j7200/dev-data.c
+++ b/arch/arm/mach-k3/r5/j7200/dev-data.c
@@ -69,6 +69,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(103, &soc_lpsc_list[14]),
PSC_DEV(104, &soc_lpsc_list[15]),
PSC_DEV(102, &soc_lpsc_list[16]),
+ PSC_DEV(287, &soc_lpsc_list[13]),
};
const struct ti_k3_pd_platdata j7200_pd_platdata = {
diff --git a/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts b/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
index 735ffd3f..2823ff13 100644
--- a/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
+++ b/dts/upstream/src/arm64/ti/k3-j7200-common-proc-board.dts
@@ -18,9 +18,9 @@
model = "Texas Instruments J7200 EVM";
aliases {
- serial0 = &wkup_uart0;
+ serial0 = &main_uart0;
serial1 = &mcu_uart0;
- serial2 = &main_uart0;
+ serial2 = &wkup_uart0;
serial3 = &main_uart1;
serial5 = &main_uart3;
mmc0 = &main_sdhci0;
@@ -270,7 +270,7 @@
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
- status = "reserved";
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
bootph-all;
diff --git a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
index d9a40b48..c24b1c8f 100644
--- a/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j7200-mcu-wakeup.dtsi
@@ -274,11 +274,10 @@
compatible = "ti,j721e-uart", "ti,am654-uart";
reg = <0x00 0x42300000 0x00 0x100>;
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <48000000>;
+ clock-frequency = <96000000>;
power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 287 2>;
clock-names = "fclk";
- status = "disabled";
};
mcu_uart0: serial@40a00000 {
#####################################################################################################################
#####################################################################################################################
#####################################################################################################################
#####################################################################################################################
#####################################################################################################################
U-BOOT folder
Path: <SDK>/board-support/<U-boot folder>
diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
index 54cffa52..37214c3c 100644
--- a/board/ti/j721e/j721e.env
+++ b/board/ti/j721e/j721e.env
@@ -14,7 +14,7 @@ defined(CONFIG_TARGET_J721E_R5_EVM)
name_kern=Image
console=ttyS2,115200n8
-args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x42300000
${mtdparts}
run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
ATF changes:
Path: <SDK>/board-support/trusted-firmware-a-2.12+git
diff --git a/plat/ti/k3/include/platform_def.h b/plat/ti/k3/include/platform_def.h
index 6a05392ad..8a463ba05 100644
--- a/plat/ti/k3/include/platform_def.h
+++ b/plat/ti/k3/include/platform_def.h
@@ -90,14 +90,14 @@
/* Platform default console definitions */
#ifndef K3_USART_BASE
-#define K3_USART_BASE (0x02800000 + 0x10000 * K3_USART)
+#define K3_USART_BASE 0x42300000
#endif
/* USART has a default size for address space */
#define K3_USART_SIZE 0x1000
#ifndef K3_USART_CLK_SPEED
-#define K3_USART_CLK_SPEED 48000000
+#define K3_USART_CLK_SPEED 96000000
#endif
/* Crash console defaults */
OPTEE OS Changes:
Path : <SDK>/board-support/optee-os-4.5.0+git
diff --git a/core/arch/arm/plat-k3/platform_config.h b/core/arch/arm/plat-k3/platform_config.h
index cffca0a07..d15f9a08f 100644
--- a/core/arch/arm/plat-k3/platform_config.h
+++ b/core/arch/arm/plat-k3/platform_config.h
@@ -9,11 +9,11 @@
#include <mm/generic_ram_layout.h>
-#define UART0_BASE 0x02800000
+#define UART0_BASE 0x42300000
-#define CONSOLE_UART_BASE (UART0_BASE + CFG_CONSOLE_UART * 0x10000)
+#define CONSOLE_UART_BASE UART0_BASE
#define CONSOLE_BAUDRATE 115200
-#define CONSOLE_UART_CLK_IN_HZ 48000000
+#define CONSOLE_UART_CLK_IN_HZ 96000000
#define DRAM0_BASE 0x80000000
#define DRAM0_SIZE 0x80000000
diff --git a/mk/clang.mk b/mk/clang.mk
index d08b26e6f..8a01cd9db 100644
--- a/mk/clang.mk
+++ b/mk/clang.mk
@@ -31,7 +31,7 @@ comp-cflags-warns-clang := -Wno-language-extension-token \
# Note, use the compiler runtime library (libclang_rt.builtins.*.a) instead of
# libgcc for clang
-libgcc$(sm) := $(shell $(CC$(sm)) $(CFLAGS$(arch-bits-$(sm))) \
+libgcc$(sm) := $(shell $(CC$(sm)) $(LIBGCC_LOCATE_CFLAGS) $(CFLAGS$(arch-bits-$(sm))) \
-rtlib=compiler-rt -print-libgcc-file-name 2> /dev/null)
# Core ASLR relies on the executable being ready to run from its preferred load
#####################################################################################################################
#####################################################################################################################
#####################################################################################################################
#####################################################################################################################
#####################################################################################################################
KERNEL
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 735ffd3f3..2823ff137 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -18,9 +18,9 @@ / {
model = "Texas Instruments J7200 EVM";
aliases {
- serial0 = &wkup_uart0;
+ serial0 = &main_uart0;
serial1 = &mcu_uart0;
- serial2 = &main_uart0;
+ serial2 = &wkup_uart0;
serial3 = &main_uart1;
serial5 = &main_uart3;
mmc0 = &main_sdhci0;
@@ -270,7 +270,7 @@ J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */
&wkup_uart0 {
/* Wakeup UART is used by System firmware */
- status = "reserved";
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>;
bootph-all;
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index d9a40b480..c24b1c8f2 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -274,11 +274,10 @@ wkup_uart0: serial@42300000 {
compatible = "ti,j721e-uart", "ti,am654-uart";
reg = <0x00 0x42300000 0x00 0x100>;
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
- clock-frequency = <48000000>;
+ clock-frequency = <96000000>;
power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 287 2>;
clock-names = "fclk";
- status = "disabled";
};
mcu_uart0: serial@40a00000 {
Thanks for the support.
Hi again Gokul,
I have one more question regarding WKUP_UART.
If we use WKUP_UART both for boot logs and as the Linux terminal, could this impact the system in any way?
Since the device tree marks it as /* Wakeup UART is used by System firmware */, we are not entirely sure whether using it for the console might cause issues later on.
It would also be very helpful if you could share some references or documentation about what exactly the "System Firmware" is.
Thanks in advance,
Hi Santiago,
Can you raise a separate thread for that so that the system firmware expert can answer the query.
Regards
Gokul