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The SPI clock is fixed and does not change and the GPIO chip select (CS) signal fails to go high.

Part Number: TDA4VH-Q1
Other Parts Discussed in Thread: TDA4VH

Tool/software:

HI
  TDA4VH   ti-processor-sdk-linux-adas-j784s4-evm-09_02_00_05

I'm using 4 GPIOs as CS, and I've verified that the pinmux settings are correct.

  1. ../spidev_test -s 3000000 -D /dev/spidev2.1 -C -p "1233456789abcdefghigklmnopq" The spiclk remains at 120KHZ


Best Regards, 
Jun

  • Hi Jun,

    McSPI clock has some hardware limitations for what clock it can divide down to. Would you be able to try to change clock to one of the clock rates in below table?

    Regards,

    Takuma

  • Hi Takuma

        mcspi->ref_clk_hz is 0.

    How can I make it get 50MHz or other non-zero values?

    static int omap2_mcspi_setup_transfer(struct spi_device *spi,
    struct spi_transfer *t)
    {
    struct omap2_mcspi_cs *cs = spi->controller_state;
    struct omap2_mcspi *mcspi;
    u32 ref_clk_hz, l = 0, clkd = 0, div, extclk = 0, clkg = 0;
    u8 word_len = spi->bits_per_word;
    u32 speed_hz = spi->max_speed_hz;
    // printk("spi->max_speed_hz %d\n",speed_hz);
    mcspi = spi_master_get_devdata(spi->master);

    if (t != NULL && t->bits_per_word)
    word_len = t->bits_per_word;

    cs->word_len = word_len;

    if (t && t->speed_hz)
    speed_hz = t->speed_hz;

    // printk("speed_hz %d,t->speed_hz %d\n",speed_hz, t->speed_hz);
    ref_clk_hz = mcspi->ref_clk_hz;
    printk("ref_clk_hz %d\n",ref_clk_hz);
    ...
    }
    Best Regards, 
    Jun
  • Hi Jun,

    Might be related to the issue seen in this E2E thread: 

     RE: AM68A: Linux device tree spi-max-frequency 

    Is it possible to try out a newer SDK version?

    Regards,

    Takuma