SK-TDA4VM: Registering MCU timer interrupts

Ner Fellon

Part Number: SK-TDA4VM

Tool/software:

Dear Ti,

I am working on a custom SK-TDA4VM–like board that is identical to the original TI reference design, and I am using Processor SDK RTOS (ti-processor-sdk-rtos-j721e-evm-09_02_00_05). My goal is to set up the MCU GPT timers on the MCU R5F core for different tasks, but I am running into a couple of issues:

Clock configuration issue
When I call Sciclient_pmSetModuleClkFreq() to change the timer clock frequency (target 12 MHz), the odd-numbered timers (1, 3, 5, 7) fail to set.
According to the TRM, their clock sources are tied to the RCOSC 12.5 MHz clock:
- TISCI_DEV_MCU_TIMER1_CLKSEL_VD_CLK_PARENT_J7_WAKEUP_16FF_WKUP_0_WKUP_RCOSC_12P5M_CLK
- TISCI_DEV_MCU_TIMER3_CLKSEL_VD_CLK_PARENT_J7_WAKEUP_16FF_WKUP_0_WKUP_RCOSC_12P5M_CLK
- TISCI_DEV_MCU_TIMER5_CLKSEL_VD_CLK_PARENT_J7_WAKEUP_16FF_WKUP_0_WKUP_RCOSC_12P5M_CLK
- TISCI_DEV_MCU_TIMER7_CLKSEL_VD_CLK_PARENT_J7_WAKEUP_16FF_WKUP_0_WKUP_RCOSC_12P5M_CLK
By contrast, the even-numbered timers (2, 4, 6, 8) can be set successfully without issue.
Interrupt registration issue
When I attempt to register interrupts for the MCU timers, the registration fails for all timers.

        rmIrqReq.valid_params           = TISCI_MSG_VALUE_RM_DST_ID_VALID;
        rmIrqReq.valid_params          |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
        rmIrqReq.src_id                 = TISCI_DEV_MCU_TIMER0;
        rmIrqReq.global_event           = 0U;
        rmIrqReq.src_index              = 0U;
        rmIrqReq.dst_id                 = TISCI_DEV_MCU_R5FSS0_CORE0;
        rmIrqReq.dst_host_irq           = CSLR_MCU_R5FSS0_CORE0_INTR_MCU_TIMER0_INTR_PEND_0;
        rmIrqReq.ia_id                  = 0U;
        rmIrqReq.vint                   = 0U;
        rmIrqReq.vint_status_bit_index  = 0U;
        rmIrqReq.secondary_host         = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;
        status = Sciclient_rmIrqSet(
                        &rmIrqReq, &rmIrqResp, APP_SCICLIENT_TIMEOUT);

I this right how am I doing it?

Regards,

Ner

7 months ago

0 Neehar Sawant 7 months ago

TI__Mastermind 22680 points

Hi Ner,

Let me look into this further and get back to you tomorrow.

Thanks,

Neehar

0 Neehar Sawant 7 months ago in reply to Neehar Sawant

TI__Mastermind 22680 points

Hi Ner,

Can you confirm you are able to make other Sciclient calls with no issues? I want to ensure you have sciserver running on MCU1_0 and are able to communicate properly with sciclient calls.

Thanks,

Neehar

0 Ner Fellon 7 months ago in reply to Neehar Sawant

Intellectual 495 points

Hi Neehar,

Yes, I can make other Sciclient calls. At the beginning of the code I request the clck frequency (Sciclient_pmGetModuleClkFreq) of each timer from MCU_TIMERS and only the even numbered timers have values, the odd numbered timers are zero.

Regards

0 Neehar Sawant 7 months ago in reply to Ner Fellon

TI__Mastermind 22680 points

Hi Ner,

Thanks for this information.

Let me check on your interrupt routing and get back to you.

Thanks,

Neehar

0 Ner Fellon 6 months ago in reply to Neehar Sawant

Intellectual 495 points

Hi,

There are any updates on this thread?

Regards

0 Neehar Sawant 6 months ago in reply to Ner Fellon

TI__Mastermind 22680 points

Hi Ner,

Have you ran the OSAL example test application provided within PDK at main_osal_test.c? This test app has been validated and you can refer to it as a reference on how to do interrupt routing as well.

PATH: ti-processor-sdk-rtos-j784s4-evm-11_00_00_06/pdk_j784s4_11_00_00_21/packages/ti/osal/test/src/main_osal_test.c

Thanks,

Neehar

0 Ner Fellon 6 months ago in reply to Neehar Sawant

Intellectual 495 points

Hi,

I will check it.

Regards

0 Neehar Sawant 6 months ago in reply to Ner Fellon

TI__Mastermind 22680 points

Hi Ner,

Thanks, I will wait for your results.

Thanks,

Neehar

0 Neehar Sawant 5 months ago in reply to Neehar Sawant

TI__Mastermind 22680 points

Hi Ner,

Following up, is this issue still open?

Thanks,

Neehar

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SK-TDA4VM: Registering MCU timer interrupts