TDA4VEN-Q1: GPIO1_72, I2C Open Drain and Mux Modes

Hi,

Let me confirm these queries and get back to you.

Thanks,

Neehar

Hello Neehar,

What was the response from the team, please?

Hi Bernhard,

Bernhard Boehmer said:

says that GPIO1_[71:52] are actually not pinned out and therefore not available on the J722S family of parts. Is this also true for GPIO1_72?

That is correct, you should not have any issues with GPIO1_72.

Bernhard Boehmer said:

However, all of these are listed as GPIO capable (Mux Mode = IOD). Please confirm whether these pins are able of driving output high when configured as GPIO.

Even though these are labeled as I2C Open Drain and the buffer type is IOD, you can still use these as regular GPIO pins as well.

Bernhard Boehmer said:

3. sprsp96a Table 5-1 has two GPIO-capable pins showing all mux modes as input-only:

B24 MMC1_SDCD
A24 MMC1_SDWP

Are the directions for the different Mux Types in the Table correct?

Yes, this is correct. You will only be able to use these pins as input.

Bernhard Boehmer said:

When are updates of the datasheet and Technical Reference Manuals expected, please?

We do not release exact dates for when new releases of datasheets and TRM will be available.

Thanks,

Neehar

Hello Neehar,

Thank you for the response.

> That is correct, you should not have any issues with GPIO1_72.

GPIO1_72 is not available according to TI SysConfig 1.25.0+4268. Please confirm whether a) GPIO1_72 is available and the tool is in error or whether b) GPIO1_72 is unavailable and the datasheet is in error.

> Even though these are labeled as I2C Open Drain and the buffer type is IOD, you can still use these as regular GPIO pins as well.

OK, thank you. Can you have the datasheet updated to reflect this, please?

> You will only be able to use these pins as input.

According to sprsp96a, B24 MMC1_SDCD can be set to the following functions:

The MCAN1_TX and SPI2_CLK functions are shown as input here in Table 5-1. However, in the later pin tables, these are shown as 'O' (Table 5-38) and 'IO' (Table 5-48) respectively:

Which of these tables are correct, please?

Similarly MMC1_SDWP, which can be set to:

- UART6_TXD, shown as input in Table 5-1 at the MMC1_SDWP pin description, but as output in Table 5-78, similarly

- TIMER_IO7 (I vs IO), and similarly

- SPI1_CS1 (I vs. IO)

Which information is correct, please?

Hello Neehar,

Neehar Sawant said:

I have checked on this confirmed that this is an issue in the datasheet and GPIO1_72 is not available.

Thank you for the confirmation. Can you have the datasheet corrected, please?

Neehar Sawant said:

What needs to be updated in the datasheet on this?

They are only listed as Open Drain Buffer Type [13] in Table 5-1:

However, Section 6.6 does not have a VOH spec for this Buffer Type (which is to be expected, since it is Open Drain):

Yet you say that they can be used as regular GPIO as well, implying that they are push-pull output capable, which therefore requires another Buffer Type in Table 5-1, if this is true:

Bernhard Boehmer said:

> Even though these are labeled as I2C Open Drain and the buffer type is IOD, you can still use these as regular GPIO pins as well.

Please confirm.

Neehar Sawant said:

This is an issue in the padconfig table, I would recommend following the pin types in Table 5 as those are correct.

If Table 5-1 is correct, and pin B24 (for instance) can be input only, then how can this pin be used for MCAN1_TX (for instance), please? Which part of Table 5-1 is correct, the pin directions or the mux modes (taking pin B24 as an example, but this is also relevant for pin A24 (eg. as UART6_TX))? Are output-oriented Mux Modes (like MCAN1_TX or UART6_TX) for these two pins perhaps selectable but not actually useable since no output driver seems to be available on these pins?