AM62L-PROCESSOR-SDK: How to configure main_spi0 DMA

Is it same as AM62x?

Hi Tony, please allow me some time to check this. I will come back to you early next week.

thank you,

Paula

Hi Tony, one thing to keep in mind is that pinmux would be different. So, from https://www.ti.com/lit/ds/symlink/am62l.pdf we have:

Above should translate in something like below:

&main_pmx0 {
main_spi0_pins_default: main-spi0-pins-default {
pinctrl-single,pins = <
AM62LX_IOPAD(0x01a8 PIN_INPUT, 0) /* (E13) SPI0_CLK */
AM62LX_IOPAD(0x01ac, PIN_INPUT, 0) /* (E12) SPI0_D0 */
AM62LX_IOPAD(0x01b0, PIN_INPUT, 0) /* (B12) SPI0_D1 */
AM62LX_IOPAD(0x01a0, PIN_INPUT, 0) /* (E11) SPI0_CS0 */
>;
};
};

Also, you would need to enable SPI0 controller, something like below:

&main_spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
#address-cells = <1>;
#size-cells = <0>;

/* Add your SPI device here */
spidev@0 {
compatible = "rohm,dh2228fv";
reg = <0>;
spi-max-frequency = <24000000>;
};
}; 

One thing is that in in the current AM62L3 EVM device tree, pins E12 and B12 are configured as GPIOs, as shown below, so you probably would need to remove them (or modify them) when enabling SPI0 to avoid conflicts:

AM62LX_IOPAD(0x01ac, PIN_INPUT, 7) /* (E12) SPI0_D0.GPIO0_90 */
AM62LX_IOPAD(0x01b0, PIN_INPUT, 7) /* (B12) SPI0_D1.GPIO0_91 */

https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts?h=ti-linux-6.12.y#n234

https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-am62l3-evm.dts?h=ti-linux-6.12.y#n221 

Thank you,

Paula

Hi Paula,

We need DMA configuration for main_SPI0. 

Hi Tony, my apology for answering a different question =/.

In any case, yes, you can use a similar approach as done in AM62x. Below FAQ offers a guide to enable DMA in SPI for AM6x devices.

(+) [FAQ] AM6x: Optimizing SPI-transfer inter-byte gaps using the DMA in Linux - Processors forum - Processors - TI E2E support forums

thank you,

Paula