Patch code:
static int tvp514x_upgrade_08006(struct tvp514x_decoder *decoder)
{
u8 crc_lsb,crc_msb,crc;
v4l_err(decoder->client,"tvp514x_upgrade_08006:start\n");
/* 1.Place the CPU into Reset */
v4l_err(decoder->client,"tvp514x_upgrade_08006:step 1\n");
tvp514x_write_reg(decoder->client, 0xE8, 0x60);
tvp514x_write_reg(decoder->client, 0xE9, 0x00);
tvp514x_write_reg(decoder->client, 0xEA, 0xB0);
tvp514x_write_reg(decoder->client, 0xE0, 0x01);
msleep_interruptible(500);
/*2.Set the VBUS to the Beginning of Program RAM*/
v4l_err(decoder->client,"tvp514x_upgrade_08006:step 2\n");
tvp514x_write_reg(decoder->client, 0xE8, 0x00);
tvp514x_write_reg(decoder->client, 0xE9, 0x00);
tvp514x_write_reg(decoder->client, 0xEA, 0x40);
msleep_interruptible(500);
/*3. Load the RAM Code*/
v4l_err(decoder->client,"tvp514x_upgrade_08006:step 3\n");
v4l_err(decoder->client,"tvp514x_upgrade_08006:step 3 patch siz:%d\n",sizeof(tvp5146m2_v08006));
tvp514x_write_block(decoder->client, (u8)0xE1, (u8)sizeof(tvp5146m2_v08006),(const u8 *)tvp5146m2_v08006);
msleep_interruptible(500);
/*4.Set the RAM Loaded Bit*/
v4l_err(decoder->client,"tvp514x_upgrade_08006:step 4\n");
tvp514x_write_reg(decoder->client, 0xE8, 0x60);
tvp514x_write_reg(decoder->client, 0xE9, 0x00);
tvp514x_write_reg(decoder->client, 0xEA, 0xB0);
tvp514x_write_reg(decoder->client, 0xE0, 0x03);
msleep_interruptible(500);
/*5.OPTIONAL – Run CRC*/
v4l_err(decoder->client,"tvp514x_upgrade_08006:step 5\n");
tvp514x_write_reg(decoder->client, 0xE8, 0x63);
tvp514x_write_reg(decoder->client, 0xE9, 0x00);
tvp514x_write_reg(decoder->client, 0xEA, 0xB0);
tvp514x_write_reg(decoder->client, 0xE0, 0x04);
msleep_interruptible(500);
crc_lsb = tvp514x_read_reg(decoder->client, 0x63);
crc_msb = tvp514x_read_reg(decoder->client, 0x00);
crc = tvp514x_read_reg(decoder->client, 0xB0);
v4l_err(decoder->client,
"tvp514x_upgrade_08006: CRC result: msb:0x%x lsb:0x%x crc:0x%x\n",
crc_msb, crc_lsb, crc);
/*Release the CPU Reset*/
v4l_err(decoder->client,"tvp514x_upgrade_08006:step 6\n");
tvp514x_write_reg(decoder->client, 0xE8, 0x60);
tvp514x_write_reg(decoder->client, 0xE9, 0x00);
tvp514x_write_reg(decoder->client, 0xEA, 0xB0);
tvp514x_write_reg(decoder->client, 0xE0, 0x02);
v4l_err(decoder->client,"tvp514x_upgrade_08006:end\n");
msleep_interruptible(500);
return 0;
}
Run result:
oot@dm37x-evm:~/mpegts# insmod tvp514x-int.ko debug=1
tvp514x 3-005d: tvp514x_upgrade_08006:start
tvp514x 3-005d: tvp514x_upgrade_08006:step 1
tvp514x 3-005d: tvp514x_upgrade_08006:step 2
tvp514x 3-005d: tvp514x_upgrade_08006:step 3
tvp514x 3-005d: tvp514x_upgrade_08006:step 3 patch siz:13168
tvp514x 3-005d: tvp514x_upgrade_08006:step 4
tvp514x 3-005d: tvp514x_upgrade_08006:step 5
tvp514x 3-005d: tvp514x_upgrade_08006: CRC result: msb:0x0 lsb:0x0 crc:0x0
tvp514x 3-005d: tvp514x_upgrade_08006:step 6
tvp514x 3-005d: tvp514x_upgrade_08006:end
tvp514x 3-005d: chip id detected msb:0x0 lsb:0x0 rom version:0x0
tvp514x 3-005d: chip id mismatch msb:0x0 lsb:0x0
tvp514x 3-005d: Unable to detect decoder
tvp514x 3-005d: Registered to v4l2 master omap34xxcam!!
The orig rom version is :0x03