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AM3352: bootup stuck at “Starting Kernel”

Jie Wang
Prodigy 110 points
Part Number: AM3352


Tool/software:

Schematic: Master is PROC AM3352 U3, the SPI0_CLK goes from PROC to the MUX U84 . The output of the MUX goes to the SPI slave U72. There is also a header J31 on this SPI0 bus for measurement. On PCB, the trace goes from U3->J31->U84.

Problem statement: A few boards failed bootup. It always stuck at "Starting kernel..". We made several experiments on this boards:

a. Adding 3.6pF capacitor on PROC_SPI0_CLK can make the board boot up successfully.

b. Add 1K PD resistors on PROC_SPI0_CLK, it also work

c. Cut off PROC_SPI0_CLK. then insert a 22ohm series resistor, it makes the board boot up successfully.

At the beginning, we suspect if there is big overshoot on PROC_SPI0_CLK, so we measured this net on the destination(U84.5 pin), the waveform is perfect, no overshoot, no undershoot. See the waveform below. 

How does PROC (master) side samples the MISO signal?  Is it sampled by the SPI0_CLK on PROC’s pin or is it sampled by PROC internal clock before the output flip-flop? Can you please help to share the internal block diagram for SPI0_CLK. We measured PROC_SPI0_CLK on the source side(AM3352 A17 pin).  There is ditch on the rising and falling edge of SPI0_CLK.  If the MISO is sampled on the SPI0_CLK on the output pin, the ditch may cause problem.

We are trying to understand the root cause for this issue. Very appreciate if you can help us. 

  • 0
    TI__Mastermind 21915 points

    Hi Jie,

    Jie Wang said:
    How does PROC (master) side samples the MISO signal?  Is it sampled by the SPI0_CLK on PROC’s pin or is it sampled by PROC internal clock before the output flip-flop? Can you please help to share the internal block diagram for SPI0_CLK. We measured PROC_SPI0_CLK on the source side(AM3352 A17 pin).  There is ditch on the rising and falling edge of SPI0_CLK.  If the MISO is sampled on the SPI0_CLK on the output pin, the ditch may cause problem.

    I can remember we were inserting the following return paths to the figures for many peripherals in the TRMs from that era. I can see this didn't reach the AM335x TRM, however would tend to say yes, the controller uses the clock returned from the pin.

    This a MCSPI diagram from OMAP35 TRM, a device close to AM335x in terms of classic peripheral modules.

    For the distortion you are observing, I would recommend:

    1. Add a place holder for a 22-ohm serial termination close to the memory. Resistor value could be adjusted later.

    2. Remove the pin header J31 if possible. Add test points instead.

    Although not related to MCSPI and AM335x directly, the below FAQ may be helpful. See the reply from peaves.

    [FAQ] AM625: Disturance on OSPI CLK connected to SPI NOR

    Thanks,

    Stan

  • 0 in reply to Stanislav Stilyanov
    TI__Guru**** 203160 points

    Hi Jie,

    Please refer below FAQ and checklist

    (+) [FAQ] AM3351 , AM3352 , AM3354 , AM3356 , AM3357 , AM3358 , AM3359 Custom board design – Collaterals to Get started - Processors forum - Processors - TI E2E support forums

    Peripheral Clocking Several peripheral clocks are required to have RXACTIVE bit set as input because they are used to retime read data returning to the device. We also recommend a series resistor located as close to the device as possible to reduce reflections on the clock. For the following peripherals, the associated signals should have a series resistor (33 Ω) in line as close to the processor as possible when used in master mode (AM335x drives the clock). • GPMC - GPMC_CLK • MMC - MMC_CLK • SPI - SPI_CLK • McASP (all clocks and frame syncs)

    Regards,

    Sreenivasa

  • 0 in reply to Stanislav Stilyanov
    Prodigy 110 points

    Hi，Stanislav

     We made some experiments trying to tune the distortions of Clock on source side, then see if the board can bootup or not. There are something I don't quite understand. See experiment3. The distortion is even bigger but the board still can bootup. (All the waveform below are measured at AM352 pin.(source side) 

    For original case, the board failed boot up. There is some distortion on SPI0_CLK when measured at AM352 pin. See the waveform below:

    Experiment1： we added a 3.6pF cap on SPI0_CLK at J31 pin, the distortion seems smaller,  and the board boot up successfully

    Experiment2： Inserting a 33ohm resistor on SPI0_CLK， the distortion decreased and it makes board bootup successfully

    Experiment3： Then I tried increase the distortion then see if the board will fail bootup. I tried add a 22PF on SPI flash pin, the distortion becomes bigger but the board still can bootup successfully. 

    Furthermore, I added a 470ohm on J31 to make the distortion even bigger，but the board still can bootup.

  • 0 in reply to Jie Wang
    TI__Guru**** 203160 points

    Hi Jie,

    Thank you. 

    Stanislav is Out of Office today.

    Can you please measure the waveform near to the attached device and share some waveforms.

    The need for series resistor on the clock is stated in the checklist as below:

    Peripheral Clocking

    Several peripheral clocks are required to have RXACTIVE bit set as input because they are used to retime read data returning to the device. We also recommend a series resistor located as close to the device as possible to reduce reflections on the clock. For the following peripherals, the associated signals should have a series resistor (33 Ω) in line as close to the processor as possible when used in master mode (AM335x drives the clock). • GPMC - GPMC_CLK • MMC - MMC_CLK • SPI - SPI_CLK • McASP (all clocks and frame syncs)

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 110 points

    The waveform on the device side(SPI flash) are all good. No overshoot, no undershoot, no distortion. Even when the board failed bootup, the SPI0_CLK on device side are good. See the waveform.

  • 0 in reply to Jie Wang
    TI__Guru**** 203160 points

    Hi Jie,

    Thank you.

    The issues you are observing is likely due to retiming (internal clock loopback).

    The suggestion is to follow the checklist and add a series resistor near to the clock output pin of the processor.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 110 points

    Yes, it is more likely due to the clock returned from AM352 pin. Adding the series resistor can fix this issue.

    But I am still curious why increasing the distortion on AM352 pin (see experiment3),  the board still can boot up. 

  • 0 in reply to Jie Wang
    TI__Guru**** 203160 points

    Hi Jie,

    Thank you.

    The behavior is likely internal to the processor.

    There may not be an easy answer and i suspect this is the reason the series resistor has been recommended in the checklist.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 110 points

    Thanks Sreenivasa.

    I agree with you. It might be internal to processor. Is that possible to check with R&D to see if they have any clue? 

    I captured a more clear waveform of SPI0_CLK for you.

    The green waveform is captured on the original board which failed boot up.

    The blue one is captured after I added the 22pF on SPI0_CLK at SPI flash pin. Although the distortions is bigger, the board can boot up successfully everytime. 

    The waveform are all captured at AM352 pin. (The waveform on SPI flash pin is all good)

    Thanks

    Jie Wang

  • 0 in reply to Jie Wang
    Prodigy 110 points

    Sorry, I had a typo. The Blue waveform is captured on the original board which failed bootup. The green one is captured after I added the 22pF and the board can boot up successfully. 

  • 0 in reply to Jie Wang
    Prodigy 110 points

    I had a typo. The green waveform is captured after adding 22pF. The blue one is captured on original board which failed bootup. 

  • 0 in reply to Jie Wang
    TI__Guru**** 203160 points

    Hello Jie Wang

    Thank you.

    Let me check with the device expert.

    The answer is likely to be to follow the checklist.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    TI__Guru**** 203160 points

    Hello Jie Wang

    Please refer below update from the expert:

    The non-monotonic distortion on the looped back clock pin will result in a clock glitch inside the device if the non-monotonic distortion over-laps the input buffer’s switching threshold and the amplitude of this distortion is greater than the input buffer’s hysteresis.  The synchronous logic circuits in the SPI module can be over-clocked if the duration of the glitch is short.  Unpredictable behavior will occur if portions of the logic see the clock transition while other portion of the logic do not see the clock transition.

     The customer’s attempt to increased distortion also appears to be increasing the duration of the distortion.  This is most likely creating a longer glitch that allows all of the logic to see the clock transition.

     The best solution is to place a series 22 – 33 ohm resistor as close as possible to the AM335x pin (less than 200mils).  This shifts the non-monotonic step to a high voltage on rising edges and a lower voltage on falling edges, which shifts the distortion away from the input buffer’s switching threshold.

    Regards,

    Sreenivasa