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DMA I2S Synchronization Events in TMS320C5535

Other Parts Discussed in Thread: TMS320C5535, TMS320C5505

Hello, All

I am conducting a project with the purpose of reading four I2S bus data (I2S0, I2S1, I2S2, I2S3) synchronously. My hardware is TMS320C5535 eZdsp USB Kit, software is Code Composer Studio 4.2.4.

I tried to use DMA controllers to establish data transfer between I2S peripherals and DSP memory. Four DMA corresponds to four I2S bus (DMA0--I2S0, DMA1--I2S2, DMA2--I2S3, DMA3--I2S1). I have inclued DMA head file "csl_dma.c" from Chip Support Library C55XCSL in my program and set I2S0 receive event for DMA0 synchronization event, I2S2 receive event for DMA1 synchronizaiton event, I2S3 receive event for DMA2 synchronizaiton event, I2S1 receive event for DMA3 synchronizaiton event. When I debugged the program on my TMS320C5535 DSP evaluation kid, I found it did not work correctly. I checked the technical reference manual of TMS320C5535 and found DMA synchronization events just support I2S3 receive event in that chip. However, the Chip Support Library was based on C5505/5515. Then, I checked the manual of C5505 and found that chip support all the four I2S bus transmit/receive DMA synchronization events. I think this is the reason why my program did not work correctly.

It seems that the number and types of DMA synchronization events is significantly reduced in C5535 compared to C5505. And this difference was not mentioned in the application document "Migrating from TMS320C5505 to TMS320C5535". My quesiton is: if I still use C5535 and Chip support library C55XCSL, can I achieve DMA synchronized transfer between four I2S bus and memory?

Thanks!

  • Hi Wei Wu,

    You have found a bug in the documentation - in fact the DMA sync events for I2S0, I2S1, I2S2, and I2S3 are present and behave exactly as the C5515/C5505 DSPs.

    Here is the bug tracking link: http://bugzilla.dal.design.ti.com/show_bug.cgi?id=1286

    We will update the documentation ASAP.

    Meanwhile, you still have the problem of utilizing all I2S sync events...

    Have you corectly configured the EBSR register (pin muxing) to bring all four I2S ports to the device pins?

    See 1.7.3.1 External Bus Selection Register (EBSR) in spruh87a

    Are you using the edge connector of the C5535 eZdsp to access each of the 4 I2S ports?

    Only I2S2 is connected to the codec. This connection can be broken by moving DIP switch Pin 3:

      Pin 3: AIC3204I2C_ENn    (Default = OFF)
             ON = I2C, I2S2, MCLK disconnected from AIC3204
             OFF = I2C, I2S2, MCLK connected to AIC3204

    Hope this helps,
    Mark

  • Hello,

    Thanks for your help, I have figured out the problem by disconnecting I2S2 to codec AIC320412 and modified my program. I used the edge connector of the C5535 eZdsp to access each of the 4 I2S ports. To verify it works correctly, I set I2S0 as a master and I2S1 as a slave and wiring I2S0CLK to I2S1CLK, I2S0RX to I2S1DX, I2S0FS to I2S1FS. I generated several data samples and sent through I2S1 and read the data through I2S0. The self-testprogram functioned correctly.

    Wei Wu

  • Very good news!

    Please let us know if you need any further support.

    Thank you for choosing TI DSPs.

    Best Regards,
    Mark