Dear Sudheer,

I looked at the links you gave me, but I couldn't find If DRA821U4 could function like a PTP Boundary Clock (BC) and that implies that one Ethernet port acts as a PTP slave the others as a PTP masters.

Could you give me more information about that?

3.2.3.6.3.3.2.1. PTP

• Introduction

• Setup

• PTP with Ordinary Clock (MAC mode)

  • J7VCL as master clock and AM625-SK as slave clock

  • AM625-SK as master clock and J7VCL as slave clock

• PTP with Transparent Clock (Switch mode)

  • J7VCL as transparent clock, PC as master clock and AM625-SK as slave clock

  • AM625-SK as transparent clock, PC as master clock and J7VCL as slave clock

3.2.3.6.3.3.2.1.1. Introduction

Best regards

Harley Wangg

Hi, 

Harley Wangg said:

I looked at the links you gave me, but I couldn't find If DRA821U4 could function like a PTP Boundary Clock (BC) and that implies that one Ethernet port acts as a PTP slave the others as a PTP masters

This is supported by RTOS SDK. 

Its more about support from the gPTP stack.

In case of Linux, the gPTP stack is open source. 

Best Regards, 

Sudheer

Dear Sudheer,

Is PTP Boundary Clock (BC)  enabled from TI SDK out of Box?

Best Regards

Harley Wangg

Hi,

Harley Wangg said:

Is PTP Boundary Clock (BC)  enabled from TI SDK out of Box?

Yes, But one need configure the required port to be in slave mode and rest all ports acts as master.

By default based on BMCA master/slave will be decided.

Configuration of one port as slave and rest all as master, forces port mode as slave and master and BMCA will be disabled in this case.

Also, refer to the FAQ about how to force a particular port as slave.
[FAQ] TDA4VH-Q1: How do I configure CPSW MAC Port as gPTP clock Master/Slave in Ethernet Firmware (ETHFW) or ENET examples? 

Best Regards,
Sudheer