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AM335x MII_RT, IEP, MDIO, EDIO

Other Parts Discussed in Thread: PROFIBUS, AM3359

Hi,

I try to sort out whether we can use a AM335x in a new design or not. EtherCAT is a possible interface. Therefore I try to figure out which pins I therefore need.
In the Technical Reference Manual I have not found any informations about the following peripherals or feature of the PRUSS:

- MII_RT
- IEP
- MDIO
- EDIO

Is there any documentation that points out which pins are needed for certain use case (eg EtherCAT, Profibus etc., etc.)?

Any schematics of the Industrial Communications Engine (ICE) available (also beta schematics appreciated)?

Is it true that  if the PRUSS is used for EtherCAT it's difficult to use the GPMC? Any applications that uses parallel Flash and EtherCAT (maybe ICE schematic would help)?

Thanks for support.

Best regards,
Patrick

 

  • To get information about what pins are needed, please access the pin-mux utility from AM3359 product page (www.ti.com/am3359). 

    In that, you will see various pins needed for EtherCAT and PROFIBUS. 

    For PROFIBUS, the UART pins in the PRU subsystem will be required. These are located at "UART0_PRUSS" group of pins. 

    For EtherCAT, the MII0_PRUSS1, MII1_PRUSS1, and MDIO_PRUSS1 groups of pins are of use. 

    It is not difficult to use NAND flash over GPMC with EtherCAT. The ZCZ package is required, however. 

    For ICE schematics, a link will be available from the TI Wiki or Product Page in about a week's time. 

    Thank you. 

  • Hi,

    Thanks.
    What about the technical documentation of the following peripherals:

    - MII_RT
    - IEP
    - EDIO

    Anything available?

    I already use the pin-mux utility but it is very difficult to know what the peripheral shortcuts are. Any documentation about the following part of the pin-mux utility:

    How can I know what "ECAT PRUSS1" is or what functionality behind this word is?

    Thanks.

  • For the pinmux utility, there is a decent help section in the Pin Mux software and it provides a link to the user's guide on the web. Please refer to that... if you have questions, let us know. 

    For MII_RT, IEP and EDIO, our documentation is in the works for release sometime in first quarter. We are also bringing out application notes for these topics. We do not expect customer to have to deal with MII_RT or IEP details as it is all managed by the firmware that TI provides. The EDIO is for digital I/O signals directly driven from PRU subsystem. These are usually optional for EtherCAT use cases unless a very time critical I/O is to be managed. 

    So, for your application, a good starting point will be to include MII0/MII1 on PRUSS and the MDIO signals for enabling EtherCAT. 

    Thanks. 

  • As far as I can see right now with the help of the pin-mux utility only a 8Bit NAND Flash can be used with the GPMC when at the same time I want to implement EtherCAT. What if I need to connect a parallel analog to digital converter or a Dual Port RAM? Only GPMC AD0 to GPMC AD7 is available after using the MII0, MII1 and MDIO from PRUSS1. GPMC WAIT0 and WAIT1 are not available which I have to expect as necessary for a NAND flash (SPRUH73C, page 824).

  • - We connect a AD converter over serial interface on the IDK board. The ADC is in a C2000 class device that is connected over SPI.

    - It is possible to still use 16-bit NOR Flash and DPRAM when GPMC is used in Address/Data multiple mode. We are about to release schematics of AM3359 ICE board on ti.com (http://www.ti.com/tool/tmdxice3359) this week. Once you see these go live, please respond to this thread and we can discuss further.

    - In the ICE schematics that we release, you will see that the MII RXD[3:0] are using an alternative pin-out configuration. Please use that and that will relax the pin congestion.

    - Wait0 is available because collision line is not required for EtherCAT. EtherCAT work on full-duplex mode always. 

    Thanks.