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Original question:

J722SXH01EVM: MAIN_Cortex_R5_2: Error connecting to the target: (Error -1170 @ 0x0)

J722SXH01EVM: CCS support without OSPI flash and with different DDR, eMMC

Alp
Prodigy 109 points
Part Number: J722SXH01EVM
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello, 


Yes, the R5s work with the steps in the MCU+/RTOS document, but our custom board doesn't have OSPI flash.

Since there is no other method in the J722S documentation, I checked if I could modify the files for other SoCs.

The load_dmsc_hs_fs.js and GEL file for J722SEVM isn't included in the CCS either. 

1. Our custom board has different model and capacity of DDR(4GB) chip. And eMMC is also different. Are these important for programming the R5? 

2. How do we setup and program to R5s without OSPI flash?

Thank you.

  • 0
    TI__Guru 66610 points

    Hi,

    Alp said:
    1. Our custom board has different model and capacity of DDR(4GB) chip

    You need to configure your DDR from sysconfig tool or Excel generator for DDR,  and use the updated configuration in the SDK.

    What boot modes are supported from your custom board?

    Alp said:
    2. How do we setup and program to R5s without OSPI flash?

    You can use any of supported boot mode from your customer board and follow the booting sequence mentioned in MCU+SDK documentation.

    Best Regards,
    Sudheer

  • 0 in reply to Doredla Sudheer Kumar
    Prodigy 109 points

    Hi,

    Doredla Sudheer Kumar said:
    What boot modes are supported from your custom board?

    eMMC and MicroSD, primarily. UART and Ethernet are also supported. But, I don't want to use MicroSD for R5 programming.


    As far as I understand, for programming R5 with CCS, I either need to load SBL NULL into any flash storage on the board, or I need to loads sciclient_ccs_init.release.out  for SoC init with CCS.

    For J722S, I try to load sciclient_ccs_init.release.out into R5_WKUP to init the SoC, but this error occurs:

    WKUP_Cortex_R5_0: Trouble Writing Memory Block at 0x0 on Page 0 of Length 0x1130: (Error -1065 @ 0x0) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 20.0.0.3178) 
WKUP_Cortex_R5_0: File Loader: Verification failed: Target failed to write 0x00000000
WKUP_Cortex_R5_0: GEL: File: C:\Users\user\Desktop\sciclient_ccs_init.release.out: Load failed.

    Again, for J722S, there isn't any "load_dmsc_hs_fs.js" file for SoC init. So I tried to load the sciclient_ccs_init.release.out file with the Load Program on CCS and it failed.

    Doredla Sudheer Kumar said:
    You can use any of supported boot mode from your customer board and follow the booting sequence mentioned in MCU+SDK documentation.

    OK, but I don't see any other documented method for SoC init without OSPI. 

    1. How do I install the NULL Bootloader on eMMC?

    2. Or how do I successfully load the sciclient_ccs_init.release.out file for CCS without any storage?


    I benefited from the Prashant Shivhare's reply:


    "Let me try to clear your doubts about the initialization script (load_dmsc_hsfs.js) required in DEVBOOT mode.

    So, this CCS initialization script is just a way to perform SoC initialization in DEVBOOT mode. There are other ways as well to perform the same SoC initialization like using SBL NULL in other boot modes.

    What this CCS initialization script (load_dmsc_hsfs.js) does is:

    • It directly connects to the R5F core and load & run the `sciclient_ccs_init.out`.
    • This `sciclient_ccs_init.out` once starts running starts the actual SoC Initialization.
      • It first loads the System Firmware & Board Configurations on secure DMSC core.
      • It then performs the same initializations as the SBL NULL like booting all the cores, initializing peripherals like DDR."


  • +1 in reply to Alp
    TI__Guru 66610 points

    Hi,

    Alp said:
    Doredla Sudheer Kumar said:
    What boot modes are supported from your custom board?

    eMMC and MicroSD, primarily. UART and Ethernet are also supported. But, I don't want to use MicroSD for R5 programming.

    You can use SBL_eMMC to boot R5F with your custom application.

    Alp said:

    As far as I understand, for programming R5 with CCS, I either need to load SBL NULL into any flash storage on the board, or I need to loads sciclient_ccs_init.release.out  for SoC init with CCS.

    It is supported only via SBL_NULL, which is supported only from OSPI. As your custom board doesn't have OSPI, you can't use SBL NULL and boot R5F with CCS.
    Any reason looking to program R5 with CCS?

    Alp said:


    For J722S, I try to load sciclient_ccs_init.release.out into R5_WKUP to init the SoC, but this error occurs:

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    WKUP_Cortex_R5_0: Trouble Writing Memory Block at 0x0 on Page 0 of Length 0x1130: (Error -1065 @ 0x0) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 20.0.0.3178)
    WKUP_Cortex_R5_0: File Loader: Verification failed: Target failed to write 0x00000000
    WKUP_Cortex_R5_0: GEL: File: C:\Users\user\Desktop\sciclient_ccs_init.release.out: Load failed.
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Again, for J722S, there isn't any "load_dmsc_hs_fs.js" file for SoC init. So I tried to load the sciclient_ccs_init.release.out file with the Load Program on CCS and it failed.

    Sciclient_ccs_init is not bringing all cores out of reset as similar to SBL NULL. It is just a board configuration example. Using this, you can't connect to R5F via CCS and load a program.

    Alp said:
    1. How do I install the NULL Bootloader on eMMC?

    SBL NULL is not supported with eMMC. If required, you need to change the SBL NULL applicaiton to use eMMC.

    Alp said:
    2. Or how do I successfully load the sciclient_ccs_init.release.out file for CCS without any storage?

    No, Sciclient_ccs_init is also an applicaiton to be programmed using any of the boot modes supported from the custom board, as I said above, it will not reset other cores as SBL NULL, so you can connect R5F and load a program.

    You can follow the procedure below:
    1) Use SBL eMMC with the combined app (all required cores application to be combined)
    2) Use the Hello world example from the required R5F core while creating a combined AppImage.
    3) After booting, connect CCS to the required R5F core.
    4) Reset the core using CCS and then load the required applicaiton on the core and run.

    Note : Refer to J722S SDK documents for the information related to what is supported and what is not.
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j722s/11_01_00_04/exports/docs/psdk_rtos/docs/user_guide/overview.html
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j722s/11_01_00_04/exports/docs/mcu_plus_sdk_j722s_11_01_00_15/docs/api_guide_j722s/index.html


    Best Regards,
    Sudheer

  • 0 in reply to Doredla Sudheer Kumar
    Prodigy 109 points

    Thank you so much.