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TPS65224-Q1: AM62A main chip and TPS65224 I2C communication occasionally abnormal

YuWei Wu
Intellectual 280 points
Part Number: TPS65224-Q1
Other Parts Discussed in Thread: AM62A7, TPS65224

Tool/software:

Hi，

During the operation of our program, we have observed that the I2C signals sent by the main control chip occasionally experience timeout issues. This problem causes our program to return errors. Preliminary investigation suggests that the waveform generated by the I2C is abnormal

The captured erroneous signal image is as follows.

Actually, the correct signal should be as shown in the figure below.

The main control chip we use is the AM62A7, utilizing the R5 core. Our program runs on the MCU, and the PMIC chip employed is the TPS65224
We initially suspect that the issue originates from the TPS65224. During the ACK phase of the I2C communication process, the TPS65224 fails to release control of the bus in a timely manner. This prevents the main control chip from obtaining bus control, and the entire ACK phase becomes excessively long, ultimately leading to a communication timeout
What are the potential causes of this issue, and can it be resolved by modifying the register configuration?
Thanks,
Yuwei
  • 0
    TI__Guru* 78091 points

    Hi Yuwei,

    One way you can confirm which chip is holding the clock line low, is to put a resistor in series on the clock line and then observing the comms on an oscilloscope - the resistor will make a small voltage divider with the pull-up R for the I2C causing a slightly different low level depending on which side of the comms is pulling the line low - then you can tell which side is doing it. Do you think this is a test you could do? It would help us know whether TPS6522x part or AM62x part is holding the line. This kind of test is described here: https://www.i2c-bus.org/i2c-primer/serial-resistances-and-debugging/ 

    Regards,

    Katie

  • 0 in reply to Katie Pier
    Intellectual 280 points

    Hi Katie,

    We have adjusted the series resistor on the clk line to 200 ohms as suggested, and the result is shown below:

    We did not observe any significant voltage drop. During the faulty clock cycle following the ACK, the CLK signal remained consistently at a low level. We believe that the clock signal being pulled low is attributed to the SoC rather than the TPS65224.

    Could you please contact the technical support for the AM62A7 chip?

    Thanks,

    Yuwei

  • 0 in reply to YuWei Wu
    TI__Guru* 78091 points

    Hi Yuwei,

    Yes I will move the thread to the processors forum to get it reassigned. 

    Regards,

    Katie