I am working on code of McBSP as UART provided in SPRA633. It transmits well, but during reception first character is received correctly, second and onward characters are not received correctly.
I am using external crystal of 3.6864 MHz, to generate exact baud rate of 9600.
If I am receiving 10 characters and send 10 characters consecutively, not all characters are received well. If I send 10 characters not consecutively but each time a single character is send to make 10 characters all character are received well. I am using hyper terminal to send characters to DSK6713 board.
I think after receiving first character processor is busy in processing of first character, when second and onwards character are received.
my code for receiving
/*******************************************************************/
/* void ProcessReceiveData(void) */
/* */
/* This function decodes the data in the receive buffer, "recvbuf" */
/* and strips the framing start (0x0000) and Stop (0xFFFF) words. */
/* It calls the subroutine VoteLogic() to determine each bit of */
/* the ASCII character. It then puts the result in recv_msg. */
/*******************************************************************/
void ProcessReceiveData(void)
{
int i;
unsigned char recv_char = 0;
short cnt = -1;
short recv_val;
unsigned short raw_data;
unsigned short *recvbufptr; /*receive buffer pointer*/
/* Point to the receive buffer */
recvbufptr = (unsigned short *)recvbuf;
/* Process all data in the Receive buffer */
for (i = 0; i < BUFFER_SIZE; i++)
{
recv_char = 0;
/* Process each UART frame */
for (cnt = -1; cnt < 10; cnt++)
{
if(cnt == -1 || cnt == 8 || cnt == 9)
{
/* Ignore Start and Stop bits */
*recvbufptr++;
}
else
{
/* Get 16-bit data from receive buffer */
raw_data = *recvbufptr;
recvbufptr++;
/* get the value of the majority of the bits */
recv_val = VoteLogic(raw_data);
/*put received bit into proper place */
recv_char += recv_val << cnt;
}
} /* end for cnt */
/* A full BYTE is decoded. Put in result: recv_msg[i] */
recv_msg[i] = recv_char;
} /* end for I */
} /* end ProcessReceiveData() function */
Code for McBSP initialization is
void ConfigMcBSP(void)
{
MCBSP_Config mcbspCfg1 = {
/* SPCR Setup */
MCBSP_SPCR_RMK(
MCBSP_SPCR_FREE_YES, /* 1 */
MCBSP_SPCR_SOFT_DEFAULT, /* 0 */
MCBSP_SPCR_FRST_DEFAULT, /* 0 */
MCBSP_SPCR_GRST_DEFAULT, /* 0 */
MCBSP_SPCR_XINTM_XRDY, /* 00 */
MCBSP_SPCR_XSYNCERR_DEFAULT, /* 0 */
MCBSP_SPCR_XRST_DEFAULT, /* 0 */
MCBSP_SPCR_DLB_OFF, /* 0 */
MCBSP_SPCR_RJUST_RZF, /* 00 */
MCBSP_SPCR_CLKSTP_DISABLE, /* 0 */
MCBSP_SPCR_DXENA_OFF, /* 0 */
MCBSP_SPCR_RINTM_RRDY, /* 00 */
MCBSP_SPCR_RSYNCERR_DEFAULT, /* 0 */
MCBSP_SPCR_RRST_DEFAULT /* 0 */
),
/* RCR Setup */
MCBSP_RCR_RMK(
MCBSP_RCR_RPHASE_DUAL, /* 1 */
MCBSP_RCR_RFRLEN2_OF(1), /* 00010 */
MCBSP_RCR_RWDLEN2_8BIT, /* 000 */
MCBSP_RCR_RCOMPAND_MSB, /* 00 */
MCBSP_RCR_RFIG_YES, /* 1 */
MCBSP_RCR_RDATDLY_1BIT, /* 01 */ // 0 delay
MCBSP_RCR_RFRLEN1_OF(8), /* 01000 */
MCBSP_RCR_RWDLEN1_16BIT, /* 010 */
MCBSP_RCR_RWDREVRS_DISABLE /* 0 */
),
/* XCR Setup */
MCBSP_XCR_RMK(
MCBSP_XCR_XPHASE_DUAL, /* 1 */
MCBSP_XCR_XFRLEN2_OF(1), /* 00010 */
MCBSP_XCR_XWDLEN2_8BIT, /* 000 */
MCBSP_XCR_XCOMPAND_MSB, /* 00 */
MCBSP_XCR_XFIG_YES, /* 1 */
MCBSP_XCR_XDATDLY_0BIT, /* 00 */
MCBSP_XCR_XFRLEN1_OF(8), /* 01000 */
MCBSP_XCR_XWDLEN1_16BIT, /* 010 */
MCBSP_XCR_XWDREVRS_DISABLE /* 0 */
),
/* SRGR Setup */
MCBSP_SRGR_RMK(
MCBSP_SRGR_GSYNC_FREE, /* 0 */
MCBSP_SRGR_CLKSP_RISING, /* 0 */
MCBSP_SRGR_CLKSM_CLKS, /* 1 */
MCBSP_SRGR_FSGM_DXR2XSR, /* 0 */
MCBSP_SRGR_FPER_DEFAULT, /* 0 */
MCBSP_SRGR_FWID_DEFAULT, /* 0 */
MCBSP_SRGR_CLKGDV_OF(23) /* CLKGDV for (baud rate 57600=122, cpuClk=112.5MHz) */
),
/* MCR Setup */
MCBSP_MCR_DEFAULT, /* default values */
/* RCER Setup */
MCBSP_RCER_DEFAULT, /* default values */
/* XCER Setup */
MCBSP_XCER_DEFAULT, /* default values */
/* PCR Setup */
MCBSP_PCR_RMK(
MCBSP_PCR_XIOEN_SP, /* 0 */
MCBSP_PCR_RIOEN_SP, /* 0 */
MCBSP_PCR_FSXM_INTERNAL, /* 1 */
MCBSP_PCR_FSRM_EXTERNAL, /* 0 */
MCBSP_PCR_CLKXM_OUTPUT, /* 1 */
MCBSP_PCR_CLKRM_OUTPUT, /* 1 */
MCBSP_PCR_CLKSSTAT_0, /* 0 */
MCBSP_PCR_DXSTAT_0, /* 0 */
MCBSP_PCR_FSXP_ACTIVELOW, /* 1 */
MCBSP_PCR_FSRP_ACTIVELOW, /* 1 */
MCBSP_PCR_CLKXP_RISING, /* 0 */
MCBSP_PCR_CLKRP_FALLING /* 0 */
)
};
MCBSP_config(hMcbsp1, &mcbspCfg1);
} /* end of Config_McBSP(void) */
Code for EDMA Initialization is
void ConfigEDMA(void)
{
EDMA_configArgs(hEdma14,
EDMA_OPT_RMK(
EDMA_OPT_PRI_HIGH, /* 1 */
EDMA_OPT_ESIZE_16BIT, /* 01 */
EDMA_OPT_2DS_NO, /* 0 */
EDMA_OPT_SUM_INC, /* 01 */
EDMA_OPT_2DD_NO, /* 0 */
EDMA_OPT_DUM_NONE, /* 00 */
EDMA_OPT_TCINT_YES, /* 1 */
EDMA_OPT_TCC_OF(14), /* 14 */
EDMA_OPT_LINK_NO, /* 0 */
EDMA_OPT_FS_NO /* 0 */
),
/* SRC Setup */
EDMA_SRC_RMK((Uint32) xmitbuf), /*xmitbuf address*/
/* CNT Setup */
EDMA_CNT_RMK(
EDMA_CNT_FRMCNT_DEFAULT,
EDMA_CNT_ELECNT_OF(BUFFER_SIZE * 11)
),
/* DST Setup */
EDMA_DST_RMK(MCBSP_getXmtAddr(hMcbsp1)),
/* IDX Setup */
EDMA_IDX_RMK(0,0),
/* RLD Setup */
EDMA_RLD_RMK(0,0)
);
EDMA_configArgs(hEdma15,
/* OPT Setup */
EDMA_OPT_RMK(
EDMA_OPT_PRI_HIGH, /* 1 */
EDMA_OPT_ESIZE_16BIT, /* 01 */
EDMA_OPT_2DS_NO, /* 0 */
EDMA_OPT_SUM_NONE, /* 00 */
EDMA_OPT_2DD_NO, /* 0 */
EDMA_OPT_DUM_INC, /* 01 */
EDMA_OPT_TCINT_YES, /* 1 */
EDMA_OPT_TCC_OF(15), /* 15 */
EDMA_OPT_LINK_NO, /* 0 */
EDMA_OPT_FS_NO /* 0 */
),
/* SRC Setup */
EDMA_SRC_RMK(MCBSP_getRcvAddr(hMcbsp1)),
/* CNT Setup */
EDMA_CNT_RMK(
EDMA_CNT_FRMCNT_DEFAULT,
EDMA_CNT_ELECNT_OF(BUFFER_SIZE * 11)
),
/* DST Setup */
EDMA_DST_RMK((Uint32) recvbuf), /*recvbuf address*/
/* IDX Setup */
EDMA_IDX_RMK(0,0),
/* RLD Setup */
EDMA_RLD_RMK(0,0)
);
} /* End of ConfigEDMA() */
