Tool/software:
Hi TI team,
Using the existing mcspi_loopback example from MCU+ framework as base, I have created the following multicore application:
- MCSPI peripheral app running on MAIN R5F core and using SPI2 MCSPI module
- MCSPI controller app running on MCU R5F core and using MCU SPI 0 MCSPI module
- WAKEUP R5F core running prebuilt SCI Server app
Both of these MCSPI modules are available on J28 User Expansion header and they are connected with jumper wires accordingly.The test conducted is similar to loopback test i.e. controller expects same data to be returned by peripheral.
Before transmit, MCSPI controller is entering sleep of few seconds to be sure that peripheral entered in transmit before controller as stated in MCSPI chapter under MCU+ framework doc.
In interrupt or blocking operational modes I get the expected data on receiver and sender for clock speeds of 25MHz and below, but for 50MHz (max speed) clock speed data on controller is shifted and misinterpreted (e.g. expected 0xAA is read as 0xD5) while peripheral gets the expected data.
Question: Is max clock speed transfer achievable for these two operational modes or DMA mode should be used ?
NOTE: Loopback example with one MCSPI module (MCU SPI 0 or SPI2) at 50MHz with D0/D1 lines connected is successful.
BR,
Aleksandar.