TDA4VM: How to build the CCS based RTOS project for DSP,R5F

Part Number: TDA4VM
Other Parts Discussed in Thread: SYSBIOS

Tool/software:

Board setup: J721EXSOMG01EVM + J721EXCP01EVM

Hello,

I am new to TDA4VM development and need some guidance. Our goal is to perform signal processing on the DSP cores (both C66x and C7x) and communicate with the ARM and DSP,R5F cores using IPC.

We are planning to use RTOS, but we noticed that SYS/BIOS is not provided for TDA4VM. I have the following questions:

  1. How to create an RTOS-based CCS project for DSP and R5F?

    • We prefer this option because we have a little experience with SYS/BIOS, but we are open to other RTOS options.

    • What is the recommended way to create, build, and debug such projects in CCS?

  2. If RTOS/SYSBIOS is not possible:

    • Can we achieve signal processing using the Vision SDK (via CCS)?

    • If yes, what are the steps to build, load, and debug DSP/R5F code in CCS?

  3. Why is SYS/BIOS not provided for TDA4VM?

    • What alternatives are available ?

    • How should we effectively use these alternatives for DSP and R5F development?

It would be very helpful if you can provide clear instructions with references to official documentation.

Thank you

  • Hi,

    How to create an RTOS-based CCS project for DSP and R5F?

    • We prefer this option because we have a little experience with SYS/BIOS, but we are open to other RTOS options.

    • What is the recommended way to create, build, and debug such projects in CCS?

    TDA4VM SDK is based out Linux environment.

    You can use make build system for building applications.

    Refer to SDK documentation for more details.
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/11_01_00_04/exports/docs/psdk_rtos/docs/user_guide/sdk_components_j721e.html


    CCS Setup:
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/11_01_00_04/exports/docs/psdk_rtos/docs/user_guide/ccs_setup_j721e.html

    EVM Setup:
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/11_01_00_04/exports/docs/psdk_rtos/docs/user_guide/evm_setup_j721e.html

    If RTOS/SYSBIOS is not possible:

    • Can we achieve signal processing using the Vision SDK (via CCS)?

    • If yes, what are the steps to build, load, and debug DSP/R5F code in CCS?

    You can use RTOS SDK, and default IPC examples available in SDK to explore.

    Refer to IPC examples from SDK.
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/11_01_00_04/exports/docs/pdk_jacinto_11_01_00_17/docs/userguide/jacinto/modules/ipc.html#running-the-ipclld-examples

    Why is SYS/BIOS not provided for TDA4VM?

    • What alternatives are available ?

    • How should we effectively use these alternatives for DSP and R5F development?

    SYSBIOS is descoped, and no support from TI.
    Latest SDKs are supported with FreeRTOS.
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/11_01_00_04/exports/docs/pdk_jacinto_11_01_00_17/docs/userguide/jacinto/modules/freertos.html


    Best Regards,
    Sudheer

  • Hello Sudheer,
    Thanks for the pointers and links to the SDK documentation and IPC examples. I have already gone through those and performed many of the steps you mentioned.

    What I’m still stuck on is the exact method to build the DSP / R5F RTOS (or FreeRTOS) project in CCS and then load it onto the board (alongside or integrated with Linux).

    Could you please share a concrete example or steps for:

    1. Configuring a CCS project for DSP or R5F (with RTOS) — build settings, linker scripts, paths, etc.

    2. How to deploy / load the generated firmware from CCS to the target.

    3. How to integrate or coexist it with the Linux system (if applicable).

    4. How to import the PDK into CCS build the project.

    Thanks.

  • Hi,

    What I’m still stuck on is the exact method to build the DSP / R5F RTOS (or FreeRTOS) project in CCS and then load it onto the board (alongside or integrated with Linux).

    We don't have any examples or support to build from CCS.
    You can refer to the above shared links to build the DSP / R5F RTOS examples using the make file system, and then load the images from CCS.

    Best Regards,
    Sudheer

  • Hi,

    I build the project using the make file system, and then loading the firmware from CCS i'm not able to debug because source code is not opened. 

    Thanks.

  • Hi,

    I build the project using the make file system, and then loading the firmware from CCS i'm not able to debug because source code is not opened. 

    You should be able to see your application file after loading via CCS.

    Some files may not be as those will be parts of Libs created while packaging. If you perform clean build of libraries then you may able to see those files as well.

    Also, load normal image instead of strip image as strip image will not have debug symbols.

    Best Regards,
    Sudheer

  • Hello Sudheer,

    I am not able see the source file. Here is step by step how i am doing, 

    step 1 : I followed the userguide for build then i uploading the .out file in no boot mode

    not able to see the source code.getting error no source available. but i can able to see the disassembly

    step 2 : With OS

    I want to work with C7x but in this i am not even load the program

    So i tried different core here also i am not able to see the source code

    Where i am making mistake. can you clarify me?

  • Hi,

    step 1 : I followed the userguide for build then i uploading the .out file in no boot mode

    I could you are loading Release binary, which might have disabled debug symbols by default.
    Can you check with debug build and confirm?

    step 2 : With OS

    I want to work with C7x but in this i am not even load the program

    What you mean by With OS?

    Is it a different boot mode? If so, can you please share more details how you are loading C7x here. It should be loaded via SBL in SBL boot mode, if using SPL boot flow then it should be loaded from u-boot or Linux?

    If you are not using no-boot mode, the C7x core should to be loaded by your boot loader and via debugger will just load symbols by connecting to core.
    Refer to debug with HLOS Running in CCS.
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/11_01_00_04/exports/docs/psdk_rtos/docs/user_guide/ccs_setup_j721e.html#debugging-with-hlos-running-on-a72-linux-qnx

    Best Regards,
    Sudheer

  • Hi Sudheer,

    In no boot mode i used the debug .out file now i can able to see the src.

    In SD card boot mode, while i create the softlink for c7x  and rebooted. the below is error log.

    (I want to work in this mode only)

    U-Boot 2025.01-00410-g70667128cb5b-dirty (Apr 04 2025 - 18:20:14 +0000)
    
    SoC:   J721E SR1.1 GP
    Model: Texas Instruments J721e EVM
    Board: J721EX-PM2-SOM rev A
    DRAM:  2 GiB (total 4 GiB)
    Core:  149 devices, 36 uclasses, devicetree: separate
    Flash: 0 Bytes
    MMC:   mmc@4f80000: 0, mmc@4fb0000: 1
    Loading Environment from nowhere... OK
    In:    serial@2800000
    Out:   serial@2800000
    Err:   serial@2800000
    am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA00101 cpsw_ver: 0x6BA80100 ale_ver: 0x00293904 Ports:1
    Detected: J7X-BASE-CPB rev A
    Detected: J7X-VSC8514-ETH rev E2
    Net:   eth0: ethernet@46000000port@1
    Hit any key to stop autoboot:  0 
    switch to partitions #0, OK
    mmc1 is current device
    SD/MMC found on device 1
    917 bytes read in 1 ms (895.5 KiB/s)
    Loaded env from uEnv.txt
    Importing environment from mmc1 ...
    Running uenvcmd ...
    gpio: pin gpio@22_17 (gpio 281) value is 1
    gpio: pin gpio@22_16 (gpio 280) value is 0
    k3_r5f_rproc r5f@41000000: Core 1 is already in use. No rproc commands work
    Failed to load '/lib/firmware/j7-mcu-r5f0_1-fw'
    95688 bytes read in 53 ms (1.7 MiB/s)
    Load Remote Processor 2 with data@addr=0x82000000 95688 bytes: Success!
    Failed to load '/lib/firmware/j7-main-r5f0_1-fw'
    Failed to load '/lib/firmware/j7-main-r5f1_0-fw'
    Failed to load '/lib/firmware/j7-main-r5f1_1-fw'
    1014576 bytes read in 72 ms (13.4 MiB/s)
    Load Remote Processor 6 with data@addr=0x82000000 1014576 bytes: Success!
    1014576 bytes read in 72 ms (13.4 MiB/s)
    Load Remote Processor 7 with data@addr=0x82000000 1014576 bytes: Success!
    384224 bytes read in 59 ms (6.2 MiB/s)
    "Error" handler, esr 0xbf000000
    elr: 00000000808d6098 lr : 0000000080872ecc (reloc)
    elr: 00000000fff51098 lr : 00000000ffeedecc
    x0 : 0000000064800000 x1 : 0000000000000000
    x2 : 0000000000070001 x3 : 0000000000000098
    x4 : 0000000000000000 x5 : 000000000006ff69
    x6 : 0000000000000000 x7 : 0000000000000003
    x8 : 0000000000000010 x9 : 0000000000000000
    x10: 0000000000000000 x11: 00000000fde6c020
    x12: 0000000000000002 x13: 0000000000000200
    x14: 00000000ffffffff x15: 00000000fde36588
    x16: 00000000ffeed268 x17: 0000000000000000
    x18: 00000000fde5adf0 x19: 0000000000000000
    x20: 000000008205c728 x21: 0000000082000000
    x22: 00000000fde61980 x23: 0000000000000000
    x24: 00000000fff6bee0 x25: 0000000000000000
    x26: 0000000064800000 x27: 0000000000070001
    x28: 0000000064800000 x29: 00000000fde36420
    
    Code: d2800003 eb03005f 540000e1 d65f03c0 (f8236804) 
    Resetting CPU ...
    
    resetting ...
    

    and one more question, via CCS(with HLOS) loading the symbols , we need to choose our .out file or its different file.

    anyway i choosed our .out file because of my understanding this also contain the symbols.that time i got this error that is no symbols

    Regards,

    Tamilselvan P

  • Hi,

    In no boot mode i used the debug .out file now i can able to see the src.

    Thanks for the confirmation that you were able to see the src.

    In SD card boot mode, while i create the softlink for c7x  and rebooted. the below is error log.

    Have you soft linked the same debug.out loaded above in No-boot mode or different one?
    Also, note that in case of SD boot mode, once core is loaded with the firmware and starts running. By the time when you connect the debugger and connect to the core it might have completed the execution of application.

    You can add a while loop at the beginning of application based on some global variable value, after connecting and loading the symbols to the core, update the variable and proceed further to run the code.

    Best Regards,
    Sudheer