AM62A3-Q1: Schematic xSPI Flash

MI3500_SPI_Flash.pdf

Hi Dusan,

I've started looking at it but I will need some more time.

Regards,

Stan

Hello Dusan,

Please refer below review inputs.

OSPI_DQS of SOC connects to ERR# pin of memory device
verify the connection
should this connect to C3 DQS pin ?

OSPI interface signals D0..D7 pullup
Enable the pullups, Use 47K
SOC IO buffers are off during and after reset
Pullsups are recommended to hold the attached memory device inputs in a known state (does not allow to float)

OSPI_RSTn
A pullup on the reset when SOC IO is connected to reset the OSPI memory wil enabled the memory during power supply ramp and this is not recommended.
When only SOC IO is used a pulldown is recommended and the pulldown on the SOC IO does not support boot
In case boot is required a 2-input ANDing logic is recommended to support local reset
In case local reset is not required, the RESETSTATz can be connected directly to the memory reset pin

OSPI_RSTn
When RESETSTATz is used as the reset input, verify the IO level compatibility
Add a resistor divider or a level shifter
Choose the resistor value such that the delay does not affect the reset functionality

OSPI0_LBCLK0
Add a parallel pull for OSPI0_LBCLK0
Mount the parallel resistor when the series resistor is not populated

OSPI_DQS
Place R3513 1.1K close to L21 pin of SOC
Connect the net OSPI_DQS to L21
R3514 is used to minimize the stub when loopback clock is connected to DQS
Not sure on the use case for connecting loopback clock to DAQ
The provision can be deleted

Regards,

Sreenivasa

Thank you very much, Sreenivasa.