Tool/software:
Hello TI Support Team,
I am currently working on booting the AM64x EVM as a PCIe endpoint and performing DFU via PCIe. I have been following the U-Boot PCIe DFU procedure described in this example, but I am encountering issues when trying to load subsequent images (e.g., the root filesystem).
Here is a summary of what I have done so far:
- U-Boot SPL DFU over PCIe:
- I am using AM64x EVM as the PCIe EP and J784s4 EVM as the PCIe RC.
- I can successfully load tiboot3.bin, tispl.bin, and u-boot.img into the endpoint using the ./pcie_boot_copy tool from the root complex.
- The SPL prints messages indicating that the images were received and authentication passed.
- The PCIe link works during SPL, but as soon as U-Boot main (u-boot.img) starts, the PCIe link drops and does not come back.
- U-Boot configuration:
CONFIG_PCI=y CONFIG_PCI_ENDPOINT=y CONFIG_SPL_PCI=y CONFIG_SPL_PCI_ENDPOINT=y CONFIG_CMD_PCI=y # CONFIG_DM_PCI_COMPAT is not set CONFIG_DM=y CONFIG_PCI_DFU=y CONFIG_SPL_PCI_DFU=y CONFIG_PCI_DFU_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_PCI_DFU_BAR_SIZE=0x400000 CONFIG_PCI_DFU_VENDOR_ID=0x104c CONFIG_PCI_DFU_DEVICE_ID=0xb010 CONFIG_PCI_DFU_BOOT_PHASE="tiboot3.bin" CONFIG_PCI_DFU_MAGIC_WORD=0xdeadbeef CONFIG_PCIE_CDNS_TI_EP=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x800 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x3400
- Device Tree:
- I have attempted to configure k3-am642-evm.dts with a PCIe endpoint node:
&pcie0_rc {
status = "disabled";
reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
num-lanes = <1>;
};
&cbass_main {
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic500>;
pcie0_ep: pcie-ep@f102000 {
compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
reg = <0x00 0x0f102000 0x00 0x1000>,
<0x00 0x0f100000 0x00 0x400>,
<0x00 0x0d000000 0x00 0x00800000>,
<0x00 0x68000000 0x00 0x08000000>;
reg-names = "intd_cfg", "user_cfg", "reg", "mem";
interrupt-names = "link_state";
interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
max-link-speed = <2>;
num-lanes = <1>;
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 114 0>;
clock-names = "fck";
max-functions = /bits/ 8 <1>;
phys = <&serdes0_pcie_link>;
phy-names = "pcie-phy";
bootph-all;
ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
status = "okay";
};
};
Despite this configuration, once U-Boot main starts, the PCIe link drops and the endpoint disappears from the root complex.
- Current issue:
- I can load the initial bootloaders via PCIe DFU (SPL), but once U-Boot main runs, the PCIe link disappears.
- I need to send a larger image (rootfs.tar.gz) to the endpoint memory over PCIe, but cannot maintain the link long enough.
- Request:
Could you please advise:
The correct way to keep the PCIe link active in U-Boot main when running as an endpoint?
How to safely load the root filesystem (rootfs.tar.gz) into the endpoint memory over PCIe, considering PCIe Boot mechanism?
Any guidance, example commands, or patches would be greatly appreciated.
Thank you in advance.
André
