Part Number: AM6421
Tool/software:
We are adding DP83822 phy on linux as pru_eth on icssg0.
we are using processor SDK RT-Linux 11.01.05.03 on A53 with Linux
- able to identify the Phy.
Phy is interfaced as RGMII.
We are getting below error while boot log.
[ 12.938466] TI DP83822 30032400.mdio:00: dp83822_read_straps
[ 12.947166] TI DP83822 30032400.mdio:00: dp83822_read_straps : After phy_read_mmd SOR1 strap register: 0x4203
[ 12.947199] TI DP83822 30032400.mdio:00: dp83822_probe
[ 12.974194] davinci_mdio 30032400.mdio: phy[0]: device 30032400.mdio:00, driver TI DP83822
[ 13.676802] remoteproc remoteproc3: 3000a000.txpru is available
[ 13.696255] remoteproc remoteproc4: 3000c000.txpru is available
[ 14.728711] remoteproc remoteproc5: 30034000.pru is available
[ 14.752814] remoteproc remoteproc6: 30004000.rtu is available
[ 14.773881] remoteproc remoteproc7: 30038000.pru is available
[ 14.789816] remoteproc remoteproc8: 30006000.rtu is available
[ 14.804403] icssg-prueth icssg0-eth: probe with driver icssg-prueth failed with error -2
Our modified device tree
icssg0_eth: icssg0-eth {
bootph-all;
status = "okay";
compatible = "ti,am642-icssg-prueth";
pinctrl-names = "default";
pinctrl-0 = <&icssg0_rgmii_pins_default>;
sram = <&oc_sram>;
ti,prus = <&pru0_0>, <&rtu0_0>, <&tx_pru0_0>, <&pru0_1>, <&rtu0_1>, <&tx_pru0_1>;
firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";
ti,pruss-gp-mux-sel = <2>, /* MII mode */
<2>,
<2>,
<2>, /* MII mode */
<2>,
<2>;
mii-g-rt = <&icssg0_mii_g_rt>;
mii-rt = <&icssg0_mii_rt>;
iep = <&icssg0_iep0>, <&icssg0_iep1>; //check this later if iep1 to be removed.
interrupt-parent = <&icssg0_intc>;
interrupts = <24 0 2>, <25 1 3>;
interrupt-names = "tx_ts0", "tx_ts1";
dmas = <&main_pktdma 0xc100 15>, /* egress slice 0 */
<&main_pktdma 0xc101 15>, /* egress slice 0 */
<&main_pktdma 0xc102 15>, /* egress slice 0 */
<&main_pktdma 0xc103 15>, /* egress slice 0 */
<&main_pktdma 0xc104 15>, /* egress slice 1 */
<&main_pktdma 0xc105 15>, /* egress slice 1 */
<&main_pktdma 0xc106 15>, /* egress slice 1 */
<&main_pktdma 0xc107 15>, /* egress slice 1 */
<&main_pktdma 0x4100 15>, /* ingress slice 0 */
<&main_pktdma 0x4101 15>, /* ingress slice 1 */
<&main_pktdma 0x4102 0>, /* mgmnt rsp slice 0 */
<&main_pktdma 0x4103 0>; /* mgmnt rsp slice 1 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx0", "rx1",
"rxmgm0", "rxmgm1";
icssg0_emac0: ethernet-mii0 {
phy-handle = <&icssg0_phy0>;
phy-mode = "rgmii-rxid";
syscon-rgmii-delay = <&main_conf 0x4100>;
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
/*status = "disabled";*/
/*fixed-link {
speed = <1000>;
full-duplex;
};*/// commented by us
};
/*icssg0_emac1: ethernet-mii1 {
phy-handle = <&icssg0_phy1>;
phy-mode = "rgmii-rxid";
syscon-rgmii-delay = <&main_conf 0x4104>;
// Filled in by bootloader
local-mac-address = [00 00 00 00 00 00];
//status = "disabled";
fixed-link {
speed = <1000>;
full-duplex;
};
};*/ // commented by us
};
icssg0_mdio_pins_default: icssg0_mdio_pins-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0204, PIN_OUTPUT, 0) //(P3) PRG0_MDIO0_MDC
AM64X_IOPAD(0x0200, PIN_INPUT, 0) // (P2) PRG0_MDIO0_MDIO
>;
};
icssg0_rgmii_pins_default: icssg0_rgmii_pins-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0160, PIN_INPUT, 2) // (Y1) PRG0_PRU0_GPO0.PRG0_RGMII1_RD0
AM64X_IOPAD(0x0164, PIN_INPUT, 2) // (R4) PRG0_PRU0_GPO1.PRG0_RGMII1_RD1
AM64X_IOPAD(0x0168, PIN_INPUT, 2) // (U2) PRG0_PRU0_GPO2.PRG0_RGMII1_RD2
AM64X_IOPAD(0x016c, PIN_INPUT, 2) // (V2) PRG0_PRU0_GPO3.PRG0_RGMII1_RD3
AM64X_IOPAD(0x0178, PIN_INPUT, 2) // (T3) PRG0_PRU0_GPO6.PRG0_RGMII1_RXC
AM64X_IOPAD(0x0170, PIN_INPUT, 2) // (AA2) PRG0_PRU0_GPO4.PRG0_RGMII1_RX_CTL
AM64X_IOPAD(0x018c, PIN_OUTPUT, 2) // (Y3) PRG0_PRU0_GPO11.PRG0_RGMII1_TD0
AM64X_IOPAD(0x0190, PIN_OUTPUT, 2) // (AA3) PRG0_PRU0_GPO12.PRG0_RGMII1_TD1
AM64X_IOPAD(0x0194, PIN_OUTPUT, 2) // (R6) PRG0_PRU0_GPO13.PRG0_RGMII1_TD2
AM64X_IOPAD(0x0198, PIN_OUTPUT, 2) // (V4) PRG0_PRU0_GPO14.PRG0_RGMII1_TD3
AM64X_IOPAD(0x01a0, PIN_OUTPUT, 2) // (U4) PRG0_PRU0_GPO16.PRG0_RGMII1_TXC
AM64X_IOPAD(0x019c, PIN_OUTPUT, 2) // (T5) PRG0_PRU0_GPO15.PRG0_RGMII1_TX_CTL
>;
};
&icssg0_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&icssg0_mdio_pins_default>;
#address-cells = <1>;
#size-cells = <0>;
icssg0_phy0: ethernet-phy@0 {
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; //check later
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; //check later
};
/*icssg0_phy1: ethernet-phy@1 {
reg = <1>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};*/
};
THe hardware is verifed with MCU+SDK and is working fine.
