AM620-Q1: Errata i2329

Hello,

Thank you for your query !

We will need some time to contact and discuss with the documentation team.

Please expect our response early next week !

Thanks for your patience !

Kind Regards,

Anastas Yordanov

1. There is no plan to fix this in AM62x.  Follow on devices like AM62Lx do not have this issue

2. Yes, MDIO max clock freq is 2.5MHz

Regards,

James

JJD said:

2. Yes, MDIO max clock freq is 2.5MHz

Hi James, thank you for your reply.

one and zero started this thread for us. We need clarification on the second question.

We tried to set up the MDC freq = 2.5 MHz in the device tree:

&cpsw3g_mdio {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&ethphy_mdio_pins_default>;
    bus_freq = <2500000>;
    ...
}

Hello Martin,

I am not a Linux software expert but  I think I came upon a number of E2E threads that may have more or less hints on the topic:

MDIO MDC Manual mode thread

MDIO MDC Manual mode thread 1

MDIO MDC Manual mode thread 2

Thanks

Best Regards,

Anastas 

Hello Anastas and thank you for your reply.

The problem described in the third link is exactly the same as ours. It is explained what causes the low MDC freq, but unfortunately there is no solution. We will test with lower values ​​of the TX / RX delays (in drivers/net/mdio/mdio-bitbang.c), although the chosen delay values seem to be the best according to the MDIO specification.

In the meantime, we would appreciate if you can suggest driver optimization or something else which would increase the MDC freq in manual mode.

Hello Martin,

I'm glad that the thread helped you with some hints.

I am re-assigning to our Ethernet PHY & MDIO topic expert for Linux. Please expect that some delay in the response is possible.

Thanks,

Kind Regards

Anastas Yordanov 

Hi,

Could you please provide some additional information on what you are seeing? The bit bang solution has had good success despite being low on the frequency side. Is the PHY never responding to any messages? Could please attach a portion of the console log showing the issue?

Best Regards,

Schuyler

Hello,

According to the datasheet, DP83TC817 and DP83848Q MDCMDIO Interface nominal freq is 2.5MHz. We want to use the nominal frequency.

Hi,

I will ask the team that supports the PHY. My question is if you experiencing an issue or are you in the board design phase?

Best Regards,

Schuyler

Hi.

Тhe board is in advanced development and we are testing on physical boards. We don't experience any problems in MDIO manual mode. But the customer requires the chips to operate at a nominal frequency. The current MDC freq is about 620 kHz, we need to increase it to 2.5 MHz.

Hi,

I am asking the team that supports the PHYs to comment on the issue. In the meantime please confirm that TI PHYs mentioned earlier are the ones being used.

Best Regards,

Schuyler 

DP83TC817 and DP83848Q PHY confirmed. TI PHYs supports teams suggested to increase MDCMDIO Frequency.

Hi Schuyler.

Any update on our issue?

Hello,

closing this thread in favor of new one created by customer to continue discussions on the MDIO MDC frequency topic:

Follow-up link on AM620-Q1 MDIO MDC frequency

Thanks

Best Regards,

Anastas Yordanov