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Original question:

AM623:   AM623：CPSW3G: How to assign respective RX Flow IDs to the two ports of CPSW3G in Independent MAC Mode？

AM625: about cpsw3g isolation

hao teng
Intellectual 450 points

Part Number: AM625

How can I obtain the interrupt link for CPSW?

  • 0
    TI__Mastermind 20240 points

    Hello Hao,

    • Use the following steps to configure RX Interrupt mapping to a specific port and CPU affinity
      1. Manually apply this patch series: https://lore.kernel.org/all/20250514-am65-cpsw-rx-class-v4-0-5202d8119241@kernel.org/
        1. Note that not accepted upstream yet so could be very well flawed
        2. This should be applied on kernel version 6.12, older kernel versions might be missing functions that are needed for this patch series
      2. Bring eth0 and eth1 interfaces down
        1. Ifconfig eth0 down
        2. Ifconfig eth1 down
      3. Setup 8 RX channels/flows on eth1 (automatically does the same for eth0)
        1. Ethtool -L eth1 rx 8
      4. Bring eth0 and eth1 interfaces back up
        1. Ifconfig eth0 up
        2. Ifconfig eth1 up
      5. Check that more 8 "8000000.ethernet-rx0" show up and check IRQ number of those 8 rx interrupts
        1. Cat /proc/interrupts
      6. Disable/stop irqbalance
        1. Pkill irqbalance
        2. Ps -A | grep irqbalance
        3. Ps -eL -o pid,tid,class,rtprio,ni,pri,comm,args | grep irqbalance
          1. To show any irqbalance child processes… caused issues the second time I set this up
        4. Kill -9 <PID>
      7. Map eth1 to its MAC address and RX flow/channel number
        1. The interface can be either eth0 or eth1 since the ALE and the DMA Channels are shared across them. However, for the sake of technical correctness, the interface should be the one whose MAC Address is being used in the command as the "dst" parameter
        2. ethtool -N eth1 flow-type ether dst <mac address of eth1> action 5
        3. This would map to RX flow/channel 5
      8. Check IRQ number of RX flow/channel 5
        1. Cat /proc/interrupts | grep rx
      9. Read and change smp_affinity of IRQ number of RX flow/channel 5 (eth1- GUI monitor)
        1. Cat /proc/irq/<irq number of RX flow 5>/smp_affinity
        2. Echo 8> /proc/irq/<irq number of RX flow 5>/smp_affinity
          1. To set cpu affinity to core3 (4th core)
      10. Do the same for RX flow/channel 0 but to core1 (2nd core) - eth0-ECAT network
        1. Echo 2> /proc/irq/<irq number of RX flow 0>/smp_affinity
      11. Check the cpu affinity of the other RX flows are NOT core1 or core3
        1. Choose core0 (echo 1 >)
      12. Test with ping on both eth0 and eth1 to verify interrupt separation based on port is successful
        1. Example Log: https://gist.github.com/dao-qiu/b5387128440d727b1e9b3abf7f0011da

    With these steps running CODESYS EtherCAT Master on AM62x TI EVM controlling 11x I/O subdevices, I observed a cycle time of 505us after 67 hour runtime.

    Please let us know of any challenges applying these steps and what the performance looks like if possible. Please note, any responses here are public.

    -Daolin