TDA4VH-Q1: Resetting dutycycle and Initial delay in PWM Signal

Hello TI Expert,

• To generate PWM signal, after setting period & dutycycle, then after enable, it shows always high(100% dutycyle). Only after resetting dutycycle again with a different value, it gives the signal that's set with the latest values.
• While sending the PWM signal, we are getting a slight pulse before actually receiving the pwm signals.

  

  In here, before getting the PWM signals, we are getting around 37microsec pulse irrespective of period & dutycycle set.

  Can you please help us on this.

Thanks & Regards,

Syed Fawwaz