AM69A: U-boot: pci enum error

Hi Michael,

As you have found, PCIe is not officially supported for the Jacinto devices within SDK. You may try, but high chance it does not work as intended.

What I had tried in the previous thread for J722S was to put in the following defconfig:

"

For my previous experiment, it was using default devicetree for J721S2. However, I had to add below to U-Boot kernel configuration file (j721s2_evm_a72_defconfig):

CONFIG_CMD_PCI=y
CONFIG_PCIE_CDNS_TI=y
CONFIG_PCI=y
CONFIG_NVME=y
CONFIG_NVME_PCI=y
CONFIG_CMD_NVME=y

"

Most likely, the PCIe device itself is not getting powered on so accesses to config register returns a bus error.

Regards,

Takuma

Hi Takuma, thanks for the reply.

I have CONFIG_CMD_PCI, _PCIE_CDNS_TI, and _PCI enabled in my defconfig. Additionally I had to add "ti,j7200-pcie-host"; to the pcie0_rc dts node.

Takuma Fujiwara said:

Most likely, the PCIe device itself is not getting powered on so accesses to config register returns a bus error.

How can I confirm this? What would prevent the PCIe from being powered on?

The Serdes/Wiz are being powered up and registers accessible. Before `pci enum` trying to read its registers would return the same bus error.

Regards,

Michael

Hi Michael,

It could happen if the link training fails or the link goes down after link training succeeds.

Regards,

Takuma

Hi Takuma,

I am back looking in to this again.

I logged the register writes to the Wiz and Phy in Linux and found that U-boot had some excessive phy resets and missing a clock setup.

So I patched those, and I'm quite confident that these register writes are equivalent now.

But I still crash the first time it tries to read the PCIe register 0x0d100054.

Do you have any more advice for where I can check next? Anything to verify what I am missing? How can I confirm if it's powered on?

Thank you,

Michael

Hi Michael,

Takuma is on vacation until end of next week (US Thanksgiving), so this thread would have to wait until his return.

regards

Suman

No problem.

To expand on where I'm at, I am trying to match register writes to the Wiz, PCIe, and PHY. Here are the prints. But I still can't get the Serdes to link up, and I'm not sure what I'm missing or how to debug it. I also removed the write that was causing the reset, since I found out that Linux does not do that write.

Linux:

 [    1.888900] wiz bus@100000:wiz@5070000: 408 <= 18000000
[    1.899591] wiz bus@100000:wiz@5070000: 408 <= 18100000
[    1.990453] wiz bus@100000:wiz@5070000: 404 <= 80000000
[    2.002149] wiz bus@100000:wiz@5070000: 404 <= 0
[    2.022289] wiz bus@100000:wiz@5070000: 480 <= 20000000
[    2.032977] wiz bus@100000:wiz@5070000: 480 <= 30000000
[    2.043042] wiz bus@100000:wiz@5070000: 4c0 <= 20000000
[    2.053732] wiz bus@100000:wiz@5070000: 4c0 <= 30000000
[    2.063800] wiz bus@100000:wiz@5070000: 500 <= 20000000
[    2.074500] wiz bus@100000:wiz@5070000: 500 <= 30000000
[    2.084609] wiz bus@100000:wiz@5070000: 540 <= 20000000
[    2.095296] wiz bus@100000:wiz@5070000: 540 <= 30000000
[   16.771750] wiz bus@100000:wiz@5070000: 40c <= 20000000
[   16.786014] wiz bus@100000:wiz@5070000: 40c <= 20800000
[   16.800272] wiz bus@100000:wiz@5070000: 40c <= 22800000
[   16.840050] cdns-torrent-phy 5070000.serdes: 50 <= 252
[   17.122941] (NULL device *): 0 <= 82
[   17.133640] (NULL device *): 0 <= 382
[   17.154653] cdns-torrent-phy 5070000.serdes: 171 <= 19
[   17.163264] cdns-torrent-phy 5070000.serdes: 172 <= 19
[   17.171870] cdns-torrent-phy 5070000.serdes: 1ff <= 1
[   17.180392] cdns-torrent-phy 5070000.serdes: 171 <= 19
[   17.188999] cdns-torrent-phy 5070000.serdes: 172 <= 19
[   17.197607] cdns-torrent-phy 5070000.serdes: 1ff <= 1
[   17.206126] cdns-torrent-phy 5070000.serdes: 171 <= 19
[   17.214734] cdns-torrent-phy 5070000.serdes: 172 <= 19
[   17.223342] cdns-torrent-phy 5070000.serdes: 1ff <= 1
[   17.231862] cdns-torrent-phy 5070000.serdes: 171 <= 19
[   17.240468] cdns-torrent-phy 5070000.serdes: 172 <= 19
[   17.249075] cdns-torrent-phy 5070000.serdes: 1ff <= 1
[   17.266824] wiz bus@100000:wiz@5070000: 480 <= 70000000
[   17.284726] wiz bus@100000:wiz@5070000: 4c0 <= 70000000
[   17.302626] wiz bus@100000:wiz@5070000: 500 <= 70000000
[   17.320522] wiz bus@100000:wiz@5070000: 540 <= 70000000
[   17.334855] wiz bus@100000:wiz@5070000: 40c <= a2800000

Updated U-boot:

>0x05070408 <- 0x18000000
>0x05070408 <- 0x18100000
>0x05070408 <- 0x18100000
>0x05070404 <- 0x80000000
>0x05070404 <- 0x0
>0x05070480 <- 0x20000000
>0x05070480 <- 0x30000000
>0x050704c0 <- 0x20000000
>0x050704c0 <- 0x30000000
>0x05070500 <- 0x20000000
>0x05070500 <- 0x30000000
>0x05070540 <- 0x20000000
>0x05070540 <- 0x30000000
>0x0507040c <- 0x20000000
>0x0507040c <- 0x20800000
>0x0507040c <- 0x22800000
>0x050700a0 <- 0x252
>0x00104070 <- 0x82
>0x00104070 <- 0x82
>0x00104070 <- 0x382
>0x050782e2 <- 0x19
>0x050782e4 <- 0x19
>0x050783fe <- 0x1
>0x050786e2 <- 0x19
>0x050786e4 <- 0x19
>0x050787fe <- 0x1
>0x05078ae2 <- 0x19
>0x05078ae4 <- 0x19
>0x05078bfe <- 0x1
>0x05078ee2 <- 0x19
>0x05078ee4 <- 0x19
>0x05078ffe <- 0x1
>0x05070480 <- 0x70000000
>0x050704c0 <- 0x70000000
>0x05070500 <- 0x70000000
>0x05070540 <- 0x70000000
>0x0507040c <- 0xa2800000
pcie_cdns_ti_start_user_link
pcie_cdns_ti_user_writel: 0x02907004 0x00000001
pcie_cdns_ti pcie@2900000: failed to bring up link

Hi Michael,

Apologies for the delay, I am back in office. Let me see if I can reproduce the error logs. Could I have 1 day to set this up on AM69?

Regards,

Takuma

No problem, I appreciate any help.

Let me know if I should provide anything.

Hi Michael,

Looked into it today. Was able to reproduce the error logs of the original post by using the j7200 compatible field. And looking through the driver, looks like there is no support for AM69/J784S4. J784S4 has a slightly different device data than J7200, so I think this difference is causing the error. 

Bottom line, there is no support for PCIe in J784S4/AM69, and to enable it would require some development effort from SDK team. Request has already been made to add support, but it will be a while until support can be added due to a backlog of planned features.

Regards,

Takuma

Understood, Takuma, thank you for trying it out.

Hi Michael,

Thank you for your understanding. Will keep this ticket an open item until requirement is met.

Regards,

Takuma