AM62L: AM62L uses external RTC

Hi Knox,

Any (power) pin that can be left unconnected is listed in section datasheet 5.4 Pin Connectivity Requirements. All other (power) pins must be connected as usual.

Regards,

Stan

Hi Stan

I did not find VDD_RTC&VDDS_RTC in section 5.4. But can you please see the screenshot below, this one is for no low power mode pin connection which is the condition not using internal RTC. Should I connect VDD_RTC&BDDS_RTC to the power rail in the same row? eg. VDDS_RTC is connected to the same power rail of VDDSHV0? 

I am currently using the AM62L32 for a design that requires an external RTC and a coin cell battery.
The RTC ONLY MODE and RTC + IO + DDR MODE are not needed.
Regarding page 14 of the AM62L EVM (TMDS62LEVM) PDF, how should I modify the design?
Or is there any reference document I can refer to?

Hi HUA Wu, 

Please refer below:

https://www.ti.com/lit/an/slvafw3b/slvafw3b.pdf

3.1 PDN#1: Optimized Power Design for BOM Size and Cost

Regards,

Sreenivasa

Hi Kallikuppa Sreenivasa
However, my requirement is to use DDR4 along with an external coin cell battery and an external RTC, without any low-power mode requirements.
Section 3.1 PDN#1: Optimized Power Design for BOM Size and Cost uses LPDDR4.
May I ask which document I should refer to for my design? Or is there a reference schematic you could provide? Thank you.

Hello I HUA WU,

Thank you for the clarification !

The expert will be able to answer in one or two days.

Thank you 

Kind Regards

Anastas Yordanov 

Hello I HUA WU,

Thank you.

The same document can be used.

Please refer below section.

3.4 PDN#4: Power Supply Implementation for DDR4
The Power Delivery Network (PDN) described in this section supports AM62L + DDR4. If RTC-only or
RTC+IO+DDR low power modes are not requires, VDD_RTC can be tied to VDD_CORE (Buck1) and
VDDS_RTC can be tied to the 1.8V IO (Buck2). Figure 3-8 shows the PMIC implementation using TPS6521402
configuration.
Highlights:
• Uses TPS6521402 PMIC.
• The two external 1.8V/0.75V discrete LDOs are only needed if the application uses RTC-only or
RTC+IO+DDR low power modes.
• BOM size is highly dependent on the selected discrete devices for the RTC rails and the 3.3 IO.
• When using 3.3V input supply (lower power consumption), external 3.3V power switch is used. Example IC:
TPS22954.
• When using 4V-5V input supply, external 3.3V DCDC is used. Example IC: TPS62A01.
• External 3.3V discrete current rating is scalable based on the total current needed for 3.3V IO.

Regards,

Sreenivasa

Hi Kallikuppa Sreenivasa
I have completed the schematic design. Could you please help review it? My design uses the AM62L32 paired with a 4GB DDR4-3200 (x16) memory for an HMI application.

Hello I HUA WU,

Thank you.

Can you please confirm if you are working with any of the TI sales or Field support team members.

Regards,

Sreenivasa

Yes, I am collaborating with TI Taiwan on this project.

Hello I HUA WU,

Thank you.

Would it be possible for you to work with TI Taiwan team to submit a review request?

Regards,

Sreenivasa

Hi
I have already requested a review from TI Taiwan, but the schedule is set for late February.
In the meantime, I’m hoping to find experts here on E2E to help perform a preliminary check on my RTC and DDR4 designs to ensure there are no major issues.

Hello I HUA WU,

Thank you.

Understand.

please share the schematics over private chat.

Regards,

Sreenivasa

I have sent the details to you via private message.I have sent the details to you via private message.

Hello I HUA WU,

Thank you.

I can try to review or support partial (specific section) schematic in a week to 10 days.

Help me understand the sections of focus.

Regards,

Sreenivasa

AM62L_ANB_Processor Power Pin Mapping and EVM Board Connections_02022026.xlsx

Hello I HUA WU,

We have the processor power pin mapping excel that customer can use to verify the connection and the supply rail voltage levels used.

Regards,

Sreenivasa