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SPI protocol overhead.

sriram garikipati
Prodigy 220 points


Hi,

I am planning to transfer the compressed h.264 video data from DM6437 using SPI interface to FPGA. I am concerned about the overhead of SPI tranmission on DM6437 for the given scenario.

a) processor clock freq ~ 600Mhz

b) transmitting  3 Mb/s.

c) I dont want to use DMA to feed the SPI transmit buffers.

It would be great if some one can provide estimated overhead using  McBsp DSP/BIOS  driver or without any OS driver.

many thanks

Regards,

Sri

 

 

 

  • 0
    TI__Mastermind 18320 points

    Sri,

    Your question seems to be more of general device/system question rather than specific to BIOS, so I have moved this thread to the DM64xx video forum in hopes that you will get a faster answer there.

    Dave

  • 0
    Prodigy 80 points

    Hey Sri,

    I am working on a similar project on a DM6467. I have written a kernel driver which transmits given video data over SPI.

    May i ask why you dont wan't to use DMA?

    Regards, Clemens

  • 0 in reply to Clemens Reisner
    Prodigy 220 points

    Hi Clemens,

    Many Thanks for your reply,

    I am new to SPI interface/driver and DM6437, I just want to keep my intial design simple and interrested in knowing overhead without DMA. However I have plan to use DMA for my final product. From other projects experience, I know  DMA will significantly minimizes the overhead. It would be great if you can share your experiences about the SPI driver and DMA overhead as well. It really helps as I have plans to develop SPI BIOS driver in future releases.

    regards,

    Sri

     

     

  • 0 in reply to sriram garikipati
    Prodigy 80 points

    I can not tell you much about the DMA-less operation.

    In my project I am using the danvici_spi linux kernel driver which uses DMA by default. I have an userspace application which receive encoded h264 video data from the DSP. This application puts the data via a ioctl() to kernel space. A self developed kernel module waits for IRQ signals from an external FPGA.  If an IRQ was received it starts a spi transmission with 1024 bytes of video data. My SPI is operating at 24.75 MHz and transmission rate is about 8Mbit --> ~1 irq every ms. It takes about 500µs between the IRQ routine gets executed and the spi transmission is finished. The exact time deppends on the scheduling of the linux kernel. The ARM CPU usage in my project is jumping between 1% and 5% (kernel + userspace software).

    There are still problems with the DMA transfers of the davinci_spi driver in my project. I have written a test application for my kernel module. This one transmites dummy data  over SPI. In this case everything works perfect.

     When i use my video-application in combination with the kernel spi transmission i get a lot of SPI transmission error (visible in kernel log, dmesg). After analyzing the davinci_spi kernel source it seems that a faulty DMA transfer cancels the SPI transmission. This error does occur sporadically. This faulty DMA transfers may be caused by the data transfer betweeen ARM and DSP during video encoding.

    I have found a user with a similar problem:  http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/100/t/128319.aspx

    Maybe someone could give me a hint, how to fix the problem.

  • 0 in reply to Clemens Reisner
    Prodigy 220 points

    Hi Clemens,

    Many thanks for sharing the details, It definitely helps for a starter like me. 

    I guess this may not help you but still some thought... considering the video encoding it consumes most of the DDR bandwith. Also most of the encoders use DMA.

     make sure you are not overlapping the SPI/ DMA channels with the video encoding DMA channels.  Also make sure you use the latest version of the evmdm6437.gel( Version 1.50 ).

    regards,

    Sri