AM62A7-Q1: Change Debug UART from UART0 to UART2 in am62ax sdk

Tejas Patel

Part Number: AM62A7-Q1

In our custom am62a based hardware board, my debug uart is connected with uart2(U22 and U21) of soc, i tried to reflect the changes in k3-am62a7-sk.dts file inside bootloader source code with 11.01 sdk. i am attaching the dts for your reference

// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
 * AM62A SK: www.ti.com/.../sprr459
 *
 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am62a7.dtsi"

#include "k3-timesync-router.h"

/ {
	compatible = "ti,am62a7-sk", "ti,am62a7";
	model = "Texas Instruments AM62A7 SK";

	aliases {
		serial0 = &wkup_uart0;
		serial1 = &mcu_uart0;
		serial2 = &main_uart2;
		serial3 = &main_uart1;
		mmc0 = &sdhci0;
		mmc1 = &sdhci1;
		rtc0 = &wkup_rtc0;
		rtc1 = &tps659312;
		ethernet0 = &cpsw_port1;
		spi0 = &ospi0;
	};

	chosen {
		stdout-path = "serial2:115200n8";
	};

	memory@80000000 {
		device_type = "memory";
		/* 4G RAM */
		reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
		      <0x00000008 0x80000000 0x00000000 0x80000000>;
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/* global cma region */
		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x00 0x24000000>;
			alloc-ranges = <0x00 0xc0000000 0x00 0x24000000>;
			linux,cma-default;
		};

		c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0x99800000 0x00 0x100000>;
			no-map;
		};

		c7x_0_memory_region: c7x-memory@99900000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0x99900000 0x00 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0x9b800000 0x00 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0x9b900000 0x00 0xf00000>;
			no-map;
		};

		wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0x9c800000 0x00 0x100000>;
			no-map;
		};

		wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0x9c900000 0x00 0x1e00000>;
			no-map;
		};

		secure_tfa_ddr: tfa@9e780000 {
			reg = <0x00 0x9e780000 0x00 0x80000>;
			alignment = <0x1000>;
			no-map;
		};

		secure_ddr: optee@9e800000 {
			reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0x00 0xa0000000 0x00 0x01000000>;
			no-map;
		};
	};

	opp-table {
		/* Requires VDD_CORE at 0v85 */
		opp-1400000000 {
			opp-hz = /bits/ 64 <1400000000>;
			opp-supported-hw = <0x01 0x0004>;
			clock-latency-ns = <6000000>;
		};
	};

	vmain_pd: regulator-0 {
		/* TPS25750 PD CONTROLLER OUTPUT */
		compatible = "regulator-fixed";
		regulator-name = "vmain_pd";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vcc_5v0: regulator-1 {
		/* Output of TPS63070 */
		compatible = "regulator-fixed";
		regulator-name = "vcc_5v0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		vin-supply = <&vmain_pd>;
		regulator-always-on;
		regulator-boot-on;
	};

	vcc_3v3_main: regulator-2 {
		/* output of LM5141-Q1 */
		compatible = "regulator-fixed";
		regulator-name = "vcc_3v3_main";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vmain_pd>;
		regulator-always-on;
		regulator-boot-on;
	};

	vdd_mmc1: regulator-3 {
		/* TPS22918DBVR */
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
	};

	vcc_3v3_sys: regulator-4 {
		/* output of TPS222965DSGT */
		compatible = "regulator-fixed";
		regulator-name = "vcc_3v3_sys";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		vin-supply = <&vcc_3v3_main>;
		regulator-always-on;
		regulator-boot-on;
	};

	vddshv_sdio: regulator-5 {
		compatible = "regulator-gpio";
		regulator-name = "vddshv_sdio";
		pinctrl-names = "default";
		pinctrl-0 = <&vddshv_sdio_pins_default>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		vin-supply = <&ldo1>;
		gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x0>,
			 <3300000 0x1>;
	};

	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&usr_led_pins_default>;

		led-0 {
			label = "am62a-sk:green:heartbeat";
			gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			function = LED_FUNCTION_HEARTBEAT;
			default-state = "off";
		};
	};

	tlv320_mclk: clk-0 {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <12288000>;
	};

	hdmi0: connector-hdmi {
		compatible = "hdmi-connector";
		label = "hdmi";
		type = "a";

		port {
			hdmi_connector_in: endpoint {
				remote-endpoint = <&sii9022_out>;
			};
		};
	};

	codec_audio: sound {
		compatible = "simple-audio-card";
		simple-audio-card,name = "AM62Ax-SKEVM";
		simple-audio-card,widgets =
			"Headphone",	"Headphone Jack",
			"Line",		"Line In",
			"Microphone",	"Microphone Jack";
		simple-audio-card,routing =
			"Headphone Jack",	"HPLOUT",
			"Headphone Jack",	"HPROUT",
			"LINE1L",		"Line In",
			"LINE1R",		"Line In",
			"MIC3R",		"Microphone Jack",
			"Microphone Jack",	"Mic Bias";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&sound_master>;
		simple-audio-card,frame-master = <&sound_master>;
		simple-audio-card,bitclock-inversion;

		simple-audio-card,cpu {
			sound-dai = <&mcasp1>;
		};

		sound_master: simple-audio-card,codec {
			sound-dai = <&tlv320aic3106>;
			clocks = <&tlv320_mclk>;
		};
	};
};

&mcu_pmx0 {
	wkup_uart0_pins_default: wkup-uart0-default-pins {
		pinctrl-single,pins = <
			AM62AX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */
			AM62AX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */
			AM62AX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */
			AM62AX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */
		>;
	};
};

/* WKUP UART0 is used for DM firmware logs */
&wkup_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&wkup_uart0_pins_default>;
	status = "reserved";
};

&main_pmx0 {
	main_dss0_pins_default: main-dss0-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x100, PIN_OUTPUT, 0) /* (V17) VOUT0_VSYNC */
			AM62AX_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (T18) VOUT0_HSYNC */
			AM62AX_IOPAD(0x104, PIN_OUTPUT, 0) /* (AA22) VOUT0_PCLK */
			AM62AX_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (U17) VOUT0_DE */
			AM62AX_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
			AM62AX_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (U21) VOUT0_DATA1 */
			AM62AX_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (U20) VOUT0_DATA2 */
			AM62AX_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (U19) VOUT0_DATA3 */
			AM62AX_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (T19) VOUT0_DATA4 */
			AM62AX_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (U18) VOUT0_DATA5 */
			AM62AX_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (V22) VOUT0_DATA6 */
			AM62AX_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA7 */
			AM62AX_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V19) VOUT0_DATA8 */
			AM62AX_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (V18) VOUT0_DATA9 */
			AM62AX_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA10 */
			AM62AX_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA11 */
			AM62AX_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (W20) VOUT0_DATA12 */
			AM62AX_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (W19) VOUT0_DATA13 */
			AM62AX_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y21) VOUT0_DATA14 */
			AM62AX_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA15 */
			AM62AX_IOPAD(0x05c, PIN_OUTPUT, 1) /* (P22) GPMC0_AD8.VOUT0_DATA16 */
			AM62AX_IOPAD(0x060, PIN_OUTPUT, 1) /* (R19) GPMC0_AD9.VOUT0_DATA17 */
			AM62AX_IOPAD(0x064, PIN_OUTPUT, 1) /* (R20) GPMC0_AD10.VOUT0_DATA18 */
			AM62AX_IOPAD(0x068, PIN_OUTPUT, 1) /* (R22) GPMC0_AD11.VOUT0_DATA19 */
			AM62AX_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
			AM62AX_IOPAD(0x070, PIN_OUTPUT, 1) /* (R21) GPMC0_AD13.VOUT0_DATA21 */
			AM62AX_IOPAD(0x074, PIN_OUTPUT, 1) /* (T20) GPMC0_AD14.VOUT0_DATA22 */
			AM62AX_IOPAD(0x078, PIN_OUTPUT, 1) /* (T21) GPMC0_AD15.VOUT0_DATA23 */
		>;
	};

	main_uart0_pins_default: main-uart0-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */
			AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
		>;
	};

	main_uart1_pins_default: main-uart1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C17) I2C1_SCL.UART1_RXD */
			AM62AX_IOPAD(0x01ec, PIN_OUTPUT, 1) /* (E17) I2C1_SDA.UART1_TXD */
			AM62AX_IOPAD(0x0194, PIN_INPUT, 2) /* (C19) MCASP0_AXR3.UART1_CTSn */
			AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */
		>;
	};
	main_uart2_pins_default: main-uart1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x0b8, PIN_INPUT, 4) /* (U22) VOUT0_DATA0 @arjun*/
			AM62AX_IOPAD(0x0bc, PIN_OUTPUT, 4) /* (U21) VOUT0_DATA1 */
		>;
	};

	main_i2c0_pins_default: main-i2c0-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
			AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
			AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
		>;
	};

	main_i2c2_pins_default: main-i2c2-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
			AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
		>;
	};

	main_mmc0_pins_default: main-mmc0-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
			AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */
			AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
			AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
			AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */
			AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */
			AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */
			AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */
			AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */
			AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */
			AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */
		>;
	};

	main_mmc1_pins_default: main-mmc1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
			AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
			AM62AX_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
			AM62AX_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
			AM62AX_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
			AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
			AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */
		>;
	};

	usr_led_pins_default: usr-led-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x244, PIN_OUTPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */
		>;
	};

	main_usb1_pins_default: main-usb1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */
		>;
	};

	main_mdio1_pins_default: main-mdio1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
			AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
		>;
	};

	main_rgmii1_pins_default: main-rgmii1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */
			AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */
			AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */
			AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */
			AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */
			AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */
			AM62AX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */
			AM62AX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */
			AM62AX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */
			AM62AX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */
			AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */
			AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */
		>;
	};

	main_mcasp1_pins_default: main-mcasp1-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x090, PIN_INPUT, 2) /* (L19) GPMC0_BE0n_CLE.MCASP1_ACLKX */
			AM62AX_IOPAD(0x098, PIN_INPUT, 2) /* (R18) GPMC0_WAIT0.MCASP1_AFSX */
			AM62AX_IOPAD(0x08c, PIN_OUTPUT, 2) /* (K19) GPMC0_WEn.MCASP1_AXR0 */
			AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */
		>;
	};

	main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */
		>;
	};

	vddshv_sdio_pins_default: vddshv-sdio-default-pins {
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */
		>;
	};

	ospi0_pins_default: ospi0-default-pins {
		bootph-all;
		pinctrl-single,pins = <
			AM62AX_IOPAD(0x0000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */
			AM62AX_IOPAD(0x002c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */
			AM62AX_IOPAD(0x000c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */
			AM62AX_IOPAD(0x0010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */
			AM62AX_IOPAD(0x0014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */
			AM62AX_IOPAD(0x0018, PIN_INPUT, 0) /* (H18) OSPI0_D3 */
			AM62AX_IOPAD(0x001c, PIN_INPUT, 0) /* (K21) OSPI0_D4 */
			AM62AX_IOPAD(0x0020, PIN_INPUT, 0) /* (H19) OSPI0_D5 */
			AM62AX_IOPAD(0x0024, PIN_INPUT, 0) /* (J20) OSPI0_D6 */
			AM62AX_IOPAD(0x0028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
			AM62AX_IOPAD(0x0008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */
		>;
	};
};

&mcu_pmx0 {
	status = "okay";

	pmic_irq_pins_default: pmic-irq-default-pins {
		pinctrl-single,pins = <
			AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
		>;
	};
};

&mcu_gpio0 {
	status = "okay";
};

&main_i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;

	typec_pd0: usb-power-controller@3f {
		compatible = "ti,tps6598x";
		reg = <0x3f>;

		connector {
			compatible = "usb-c-connector";
			label = "USB-C";
			self-powered;
			data-role = "dual";
			power-role = "sink";
			port {
				usb_con_hs: endpoint {
					remote-endpoint = <&usb0_hs_ep>;
				};
			};
		};
	};

	tps659312: pmic@48 {
		compatible = "ti,tps6593-q1";
		reg = <0x48>;
		ti,primary-pmic;
		system-power-controller;

		gpio-controller;
		#gpio-cells = <2>;

		pinctrl-names = "default";
		pinctrl-0 = <&pmic_irq_pins_default>;
		interrupt-parent = <&mcu_gpio0>;
		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;

		buck123-supply = <&vcc_3v3_sys>;
		buck4-supply = <&vcc_3v3_sys>;
		buck5-supply = <&vcc_3v3_sys>;
		ldo1-supply = <&vcc_3v3_sys>;
		ldo2-supply = <&vcc_3v3_sys>;
		ldo3-supply = <&buck5>;
		ldo4-supply = <&vcc_3v3_sys>;

		regulators {
			buck123: buck123 {
				regulator-name = "vcc_core";
				regulator-min-microvolt = <715000>;
				regulator-max-microvolt = <895000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck4: buck4 {
				regulator-name = "vcc_1v1";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck5: buck5 {
				regulator-name = "vcc_1v8_sys";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo1: ldo1 {
				regulator-name = "vddshv5_sdio";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo2: ldo2 {
				regulator-name = "vpp_1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo3: ldo3 {
				regulator-name = "vcc_0v85";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <850000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo4: ldo4 {
				regulator-name = "vdda_1v8";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
};

&main_i2c1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <100000>;

	exp1: gpio@22 {
		compatible = "ti,tca6424";
		reg = <0x22>;
		gpio-controller;
		#gpio-cells = <2>;
		interrupt-parent = <&main_gpio1>;
		interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		pinctrl-names = "default";
		pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;

		gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
				   "BT_EN_SOC", "MMC1_SD_EN",
				   "VPP_EN", "EXP_PS_3V3_En",
				   "EXP_PS_5V0_En", "EXP_HAT_DETECT",
				   "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
				   "UART1_FET_BUF_EN", "BT_UART_WAKE_SOC",
				   "GPIO_HDMI_RSTn", "CSI_GPIO0",
				   "CSI_GPIO1", "WLAN_ALERTn",
				   "HDMI_INTn", "TEST_GPIO2",
				   "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
				   "MCASP1_FET_SEL", "UART1_FET_SEL",
				   "PD_I2C_IRQ", "IO_EXP_TEST_LED";
	};

	tlv320aic3106: audio-codec@1b {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic3106";
		reg = <0x1b>;
		ai3x-micbias-vg = <1>;	/* 2.0V */

		/* Regulators */
		AVDD-supply = <&vcc_3v3_sys>;
		IOVDD-supply = <&vcc_3v3_sys>;
		DRVDD-supply = <&vcc_3v3_sys>;
		DVDD-supply = <&buck5>;
	};

	exp2: gpio@23 {
		compatible = "ti,tca6424";
		reg = <0x23>;
		gpio-controller;
		#gpio-cells = <2>;

		gpio-line-names = "", "",
				  "", "",
				  "", "",
				  "", "",
				  "WL_LT_EN", "CSI_RSTz",
				  "", "",
				  "", "",
				  "", "",
				  "SPI0_FET_SEL", "SPI0_FET_OE",
				  "RGMII2_BRD_CONN_DET", "CSI_SEL2",
				  "CSI_EN", "AUTO_100M_1000M_CONFIG",
				  "CSI_VLDO_SEL", "SoC_WLAN_SDIO_RST";
	};

	sii9022: bridge-hdmi@3b {
		compatible = "sil,sii9022";
		reg = <0x3b>;
		interrupt-parent = <&exp1>;
		interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
		#sound-dai-cells = <0>;
		sil,i2s-data-lanes = < 0 >;

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;

				sii9022_in: endpoint {
					remote-endpoint = <&dpi1_out>;
				};
			};

			port@1 {
				reg = <1>;

				sii9022_out: endpoint {
					remote-endpoint = <&hdmi_connector_in>;
				};
			};
		};
	};
};

&main_i2c2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c2_pins_default>;
	clock-frequency = <400000>;
};

&sdhci0 {
	/* eMMC */
	bootph-all;
	status = "okay";
	non-removable;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc0_pins_default>;
	disable-wp;
};

&sdhci1 {
	/* SD/MMC */
	status = "okay";
	vmmc-supply = <&vdd_mmc1>;
	vqmmc-supply = <&vddshv_sdio>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	disable-wp;
};

&main_gpio0 {
	status = "okay";
};

&main_gpio1 {
	status = "okay";
};

&main_gpio_intr {
	status = "okay";
};

&main_uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	interrupts-extended = <&gic500 GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
			<&main_pmx0 0x1c8>; /* (D14) UART0_RXD PADCONFIG114 */
	interrupt-names = "irq", "wakeup";
};

/* Main UART1 is used for TIFS firmware logs */
&main_uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart1_pins_default>;
	status = "reserved";
};

&main_uart2 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart2_pins_default>;
	status = "reserved";
};

/* main_timer2 is used by C7x DSP */
&main_timer2 {
	status = "reserved";
};

&usbss0 {
	status = "okay";
	ti,vbus-divider;
};

&usb0 {
	usb-role-switch;

	port {
		usb0_hs_ep: endpoint {
			remote-endpoint = <&usb_con_hs>;
		};
	};
};

&usbss1 {
	status = "okay";
};

&usb1 {
	dr_mode = "host";
	pinctrl-names = "default";
	pinctrl-0 = <&main_usb1_pins_default>;
};

&cpsw3g {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_rgmii1_pins_default>;

	cpts@3d000 {
		/* MAP HW3_TS_PUSH to GENF1 */
		ti,pps = <2 1>;
	};
};

&cpsw_port1 {
	status = "okay";
	phy-mode = "rgmii-rxid";
	phy-handle = <&cpsw3g_phy0>;
};

&cpsw_port2 {
	status = "disabled";
};

&cpsw3g_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_mdio1_pins_default>;

	cpsw3g_phy0: ethernet-phy@0 {
		reg = <0>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
		ti,min-output-impedance;
	};
};

&fss {
	status = "okay";
};

&ospi0 {
	bootph-all;
	pinctrl-names = "default";
	pinctrl-0 = <&ospi0_pins_default>;

	flash@0{
		compatible = "spi-nand";
		reg = <0x0>;
		spi-tx-bus-width = <8>;
		spi-rx-bus-width = <8>;
		spi-max-frequency = <25000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <2>;
		cdns,phy-mode;
		bootph-all;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;
			bootph-all;

			partition@0 {
				label = "ospi_nand.tiboot3";
				reg = <0x0 0x80000>;
			};

			partition@80000 {
				label = "ospi_nand.tispl";
				reg = <0x80000 0x200000>;
			};

			partition@280000 {
				label = "ospi_nand.u-boot";
				reg = <0x280000 0x400000>;
			};

			partition@680000 {
				label = "ospi_nand.env";
				reg = <0x680000 0x40000>;
			};

			partition@6c0000 {
				label = "ospi_nand.env.backup";
				reg = <0x6c0000 0x40000>;
			};

			partition@2000000 {
				label = "ospi_nand.rootfs";
				reg = <0x2000000 0x5fc0000>;
			};

			partition@7fc0000 {
				label = "ospi_nand.phypattern";
				reg = <0x7fc0000 0x40000>;
				bootph-all;
			};
		};
	};
};

&mcasp1 {
	status = "okay";
	#sound-dai-cells = <0>;

	pinctrl-names = "default";
	pinctrl-0 = <&main_mcasp1_pins_default>;

	op-mode = <0>;          /* MCASP_IIS_MODE */
	tdm-slots = <2>;

	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
	       1 0 2 0
	       0 0 0 0
	       0 0 0 0
	       0 0 0 0
	>;
};

&dss {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&main_dss0_pins_default>;
};

&dss_ports {
	/* VP2: DPI Output */
	hdmi0_dss: port@1 {
		reg = <1>;

		dpi1_out: endpoint {
			remote-endpoint = <&sii9022_in>;
		};
	};
};

&mailbox0_cluster0 {
	ti,mbox-num-fifos = <2>;
	mbox_r5_0: mbox-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster1 {
	ti,mbox-num-fifos = <2>;
	mbox_c7x_0: mbox-c7x-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&mailbox0_cluster2 {
	ti,mbox-num-fifos = <2>;
	mbox_mcu_r5_0: mbox-mcu-r5-0 {
		ti,mbox-rx = <0 0 0>;
		ti,mbox-tx = <1 0 0>;
	};
};

&wkup_r5fss0 {
	status = "okay";
};

&wkup_r5fss0_core0 {
	mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
	memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
			<&wkup_r5fss0_core0_memory_region>;
};

&mcu_r5fss0 {
	status = "okay";
};

&mcu_r5fss0_core0 {
	mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
};

&c7x_0 {
	mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
	memory-region = <&c7x_0_dma_memory_region>,
			<&c7x_0_memory_region>;
	status = "okay";
};

/* main_rti4 is used by C7x DSP */
&main_rti4 {
	status = "reserved";
};

&timesync_router {
	/* Use Time Sync Router to map GENF1 input to HW3_TS_PUSH output */
	mux-reg-masks-state = <
		/* pps [cpsw cpts genf1] in17 -> out12 [cpsw cpts hw3_push] */
		K3_TS_OFFSET(12, 0x0001ffff, 17)
		>;
	status = "okay";
};

5 months ago

0 Bin Liu 5 months ago

TI__Guru**** 177101 points

Hi Tejas,

Please post your code change as a patch. I cannot see the changes you made from the long dts file.

0 Tejas Patel 5 months ago in reply to Bin Liu

Prodigy 230 points

HI Bin Liu

please find the attached patch file

@@ -21,7 +21,7 @@
 	aliases {
 		serial0 = &wkup_uart0;
 		serial1 = &mcu_uart0;
-		serial2 = &main_uart0;
+		serial2 = &main_uart2;
 		serial3 = &main_uart1;
 		mmc0 = &sdhci0;
 		mmc1 = &sdhci1;
@@ -317,6 +317,12 @@
 			AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */
 		>;
 	};
+	main_uart2_pins_default: main-uart1-default-pins {
+		pinctrl-single,pins = <
+			AM62AX_IOPAD(0x0b8, PIN_INPUT, 4) /* (U22) VOUT0_DATA0 @arjun*/
+			AM62AX_IOPAD(0x0bc, PIN_OUTPUT, 4) /* (U21) VOUT0_DATA1 */
+		>;
+	};
 
 	main_i2c0_pins_default: main-i2c0-default-pins {
 		pinctrl-single,pins = <
@@ -714,6 +720,13 @@
 	status = "reserved";
 };
 
+&main_uart2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&main_uart2_pins_default>;
+	status = "reserved";
+};
+
 /* main_timer2 is used by C7x DSP */
 &main_timer2 {
 	status = "reserved";

0 Bin Liu 5 months ago in reply to Tejas Patel

TI__Guru**** 177101 points

Hi Tejas,

The "status" in &main_uart2 node should be set to "okay", not "reserved".

You also need the following U-Boot change to enable main_uart2 power:

diff --git a/arch/arm/mach-k3/r5/am62ax/dev-data.c b/arch/arm/mach-k3/r5/am62ax/dev-data.c
index 6cced9efd08a..55a9d24b6c43 100644
--- a/arch/arm/mach-k3/r5/am62ax/dev-data.c
+++ b/arch/arm/mach-k3/r5/am62ax/dev-data.c
@@ -54,7 +54,7 @@ static struct ti_dev soc_dev_list[] = {
        PSC_DEV(75, &soc_lpsc_list[7]),
        PSC_DEV(36, &soc_lpsc_list[8]),
        PSC_DEV(102, &soc_lpsc_list[8]),
-       PSC_DEV(146, &soc_lpsc_list[8]),
+       PSC_DEV(153, &soc_lpsc_list[8]),
        PSC_DEV(166, &soc_lpsc_list[9]),
        PSC_DEV(135, &soc_lpsc_list[10]),
        PSC_DEV(170, &soc_lpsc_list[11]),

0 Arjun Rajput 5 months ago in reply to Bin Liu

Prodigy 190 points

I tried the changes that you have suggested, but it didn't worked

0 Bin Liu 5 months ago in reply to Arjun Rajput

TI__Guru**** 177101 points

The main_uart5 TXD/RXD pins are available on a connector of the SK-AM62A evm. I will test this with uart5 and get back to you.

0 Arjun Rajput 4 months ago in reply to Bin Liu

Prodigy 190 points

Any update on this?

0 Bin Liu 4 months ago in reply to Arjun Rajput

TI__Guru**** 177101 points

Hi, I am out of office this week due to holidays. Please expect delayed response.

0 Arjun Rajput 4 months ago in reply to Bin Liu

Prodigy 190 points

As this creating blocker in our current Design can you please help me this on urgent basis?

0 Bin Liu 4 months ago in reply to Arjun Rajput

TI__Guru**** 177101 points

Hi Arjun,

I spent a day tested this on my SK evm before the Thanksgiving holiday week, but I was unable to get uart console switched in tiboot3.bin boot stage (other stages - A53 SPL, A53 U-Boot and Linux switched as expected), and I didn't have enough time to look into it further before the holiday break.

But now I am working on a critical issue and don't have bandwidth to debug this uart console issue in the next few weeks. I am working with the team internally to see how to resolve the issue. We will keep you posted.

0 Suren Porwar 4 months ago in reply to Bin Liu

TI__Mastermind 34250 points

Hi Arjun,

Apart from the changes my colleague Bin suggested, you would also need to modify the clk-data.c

diff --git a/arch/arm/mach-k3/r5/am62ax/clk-data.c b/arch/arm/mach-k3/r5/am62ax/clk-data.c
index d950b35e..bddec537 100644
--- a/arch/arm/mach-k3/r5/am62ax/clk-data.c
+++ b/arch/arm/mach-k3/r5/am62ax/clk-data.c
@@ -114,8 +114,8 @@ static const char * const wkup_clksel_out0_parents[] = {
        "hsdiv4_16fft_mcu_0_hsdivout0_clk",
 };

-static const char * const main_usart0_fclk_sel_out0_parents[] = {
-       "usart_programmable_clock_divider_out0",
+static const char * const main_usart2_fclk_sel_out0_parents[] = {
+       "usart_programmable_clock_divider_out2",
        "hsdiv4_16fft_main_1_hsdivout1_clk",
 };

@@ -195,7 +195,7 @@ static const struct clk_data clk_list[] = {
        CLK_MUX("wkup_clkout_sel_out0", wkup_clkout_sel_out0_parents, 8, 0x43008020, 0, 3, 0),
        CLK_MUX("wkup_clkout_sel_io_out0", wkup_clkout_sel_io_out0_parents, 2, 0x43008020, 24, 1, 0),
        CLK_MUX("wkup_clksel_out0", wkup_clksel_out0_parents, 2, 0x43008010, 0, 1, 0),
-       CLK_MUX("main_usart0_fclk_sel_out0", main_usart0_fclk_sel_out0_parents, 2, 0x108280, 0, 1, 0),
+       CLK_MUX("main_usart2_fclk_sel_out0", main_usart2_fclk_sel_out0_parents, 2, 0x108288, 0, 1, 0),
        CLK_DIV("hsdiv4_16fft_mcu_0_hsdivout1_clk", "pllfracf_ssmod_16fft_mcu_0_foutvcop_clk", 0x4040084, 0, 7, 0, 0),
        CLK_FIXED_RATE("mshsi2c_wkup_0_porscl", 0, 0),
        CLK_DIV("sam62_pll_ctrl_wrap_main_0_chip_div24_clk_clk", "sam62_pll_ctrl_wrap_main_0_sysclkout_clk", 0x41011c, 0, 5, 0, 0),
@@ -266,10 +266,10 @@ static const struct dev_clk soc_dev_clk_data[] = {
        DEV_CLK(135, 0, "hsdiv0_16fft_main_8_hsdivout0_clk"),
        DEV_CLK(140, 0, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"),
        DEV_CLK(140, 1, "sam62_pll_ctrl_wrap_mcu_0_chip_div1_clk_clk"),
-       DEV_CLK(146, 0, "main_usart0_fclk_sel_out0"),
-       DEV_CLK(146, 1, "usart_programmable_clock_divider_out0"),
-       DEV_CLK(146, 2, "hsdiv4_16fft_main_1_hsdivout1_clk"),
-       DEV_CLK(146, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
+       DEV_CLK(153, 0, "main_usart2_fclk_sel_out0"),
+       DEV_CLK(153, 1, "usart_programmable_clock_divider_out2"),
+       DEV_CLK(153, 2, "hsdiv4_16fft_main_1_hsdivout1_clk"),
+       DEV_CLK(153, 5, "sam62_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
        DEV_CLK(157, 20, "clkout0_ctrl_out0"),
        DEV_CLK(157, 21, "hsdiv4_16fft_main_2_hsdivout1_clk"),
        DEV_CLK(157, 22, "hsdiv4_16fft_main_2_hsdivout1_clk"),

Let us know how it goes.

Best Regards,

Suren

0 Arjun Rajput 4 months ago in reply to Suren Porwar

Prodigy 190 points

I tried this change at my end with the changes that Bin has suggested, I still cant see any logs at UART2

0 Jay Goyal 4 months ago in reply to Arjun Rajput

TI__Intellectual 2300 points

Hi Arjun,

In the dts file, lines 278 and 279 assign the same pins to the dss and the status of the node is also set to okay. This might lead to a pinmux conflict.

Can you change the DSS or UART pinmux config as per your board to see if that helps you get the correct logs?

Regards,
Jay

0 Arjun Rajput 4 months ago in reply to Jay Goyal

Prodigy 190 points

Hello Jay Goyal

I have already noticed this conflict and we have commented this two pins in the dss and also disabled the dss at our end. Still it couldn't fix our issue.

0 Bin Liu 4 months ago in reply to Arjun Rajput

TI__Guru**** 177101 points

Hi Arjun,

We continue testing this on the AM62Ax SK evm to see what else is missing. We will keep you posted.

0 Arjun Rajput 4 months ago in reply to Bin Liu

Prodigy 190 points

Sure Bin, Thanks for the update. Can you please test this at your end on priority because this issue is creating major blocker on our customer delivery. Also please Let me know by when we can expect resolution for the same.

0 Bin Liu 4 months ago in reply to Arjun Rajput

TI__Guru**** 177101 points

Hi Arjun,

Is this the same issue as reported in the e2e thread linked below? It seems got UART2 console working in U-Boot.

AM62A7-Q1: AM335x change Linux console from UART0 to UART2

0 Arjun Rajput 4 months ago in reply to Bin Liu

Prodigy 190 points

No that is different team working on different product, our UART2 is not working in not working in U-Boot/Kernel,

0 Arjun Rajput 4 months ago in reply to Arjun Rajput

Prodigy 190 points

Bin Liu ,

earlier in the thread you have mentioned that your uart5 has switched in " (other stages - A53 SPL, A53 U-Boot and Linux switched as expected)" but not in "tiboot3.bin", can you help me to replicate the same by giving all the changes that you have done, for the time being we can ignore the tiboot3.bin logs until it is fully up.

0 Bin Liu 4 months ago in reply to Arjun Rajput

TI__Guru**** 177101 points

Hi Arjun,

The other team uses the same AM62Ax device and the same U-Boot patch, and they can get U-Boot console working on UART2, but you cannot, it is either because of your simple mistake in patching/compiling/running the U-Boot or your board has hardware problems related to UART2, you would have to investigate it.

0 Arjun Rajput 4 months ago in reply to Bin Liu

Prodigy 190 points

Hello Bin, I managed to connect with the other team and after having discussion with the firmware team i got to know that even in their team they are not able to see logs in any stage (uboot or kernel), there was misunderstanding with the person who has raised the ticket, so basically the both teams are facing the exact same issue, please suggest the workarounds to fix it, as i said earlier please help us to replicate the uart5 changes that you have done, or test it at your end as discussed

0 Bin Liu 4 months ago in reply to Arjun Rajput

TI__Guru**** 177101 points

Hi Arjun,

We know the importance of this issue, that is why Suren and Jay have been jumping in trying to help while I am working on another critical work. I will try to spend time next week to enable the console without tiboot3.bin stage, I am no longer having the setup to replicate the work at this moment.

0 Bin Liu 4 months ago in reply to Bin Liu

TI__Guru**** 177101 points

Hi Arjun,

Before I am able to work on this issue next week, can you please add the following line to the &main_uart2 node in the U-Boot devicetree with all the U-Boot patches above to see if it resolves the issue?

clock-frequency = <48000000>;

0 Arjun Rajput 4 months ago in reply to Bin Liu

Prodigy 190 points

Hello Bin, No luck with "clock-frequency = <48000000>;" too

0 Suren Porwar 4 months ago in reply to Arjun Rajput

TI__Mastermind 34250 points

Hi Arjun,

Can we get on a debug session to view your setup and proceed further?

Best Regards,

Suren

0 Suren Porwar 1 month ago in reply to Suren Porwar

TI__Mastermind 34250 points

Hi Arjun,

Do you still need support on this?

Best Regards

Suren

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AM62A7-Q1: Change Debug UART from UART0 to UART2 in am62ax sdk