Problem figuring out why NAND boot with x-loader isn't working

Jaya Kumar

Other Parts Discussed in Thread: DM3730

Hi Rowboat friends,

I am using a DM3730 based board and I have run into a bit of difficulty trying to get pure NAND boot to work.

I am using the x-loader source that came with Rowboat Devkit 2.1 Gingerbread.

*) First, I checked our standard steps on a beagleboard by flashing the MLO that we built and checking that

it is able to boot without microSD. We flash by booting into u-boot from the SD. For this initial test, we are

flashing the same x-loader that we use for booting from SD since we just want to make sure we can see

the x-loader startup message and we don't care if we don't get past that into u-boot.

Texas Instruments X-Loader 1.5.1 (Jan  6 2012 - 16:49:06)
Beagle Rev C1/C2/C3
Reading boot sector
Loading u-boot.bin from mmc


U-Boot 2010.06 (Dec 31 2011 - 21:04:15)

OMAP3430/3530-GP ES3.0, CPU-OPP2 L3-165MHz
OMAP3 Beagle board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  HW ECC [Kernel/FS layout] selected
256 MiB
*** Warning - bad CRC or NAND, using default environment

In:    serial
Out:   serial
Err:   serial
Beagle Rev C1/C2/C3
Die ID #1308000300000000040323091000a01a
Hit any key to stop autoboot:  0 

OMAP3 beagleboard.org # fatload mmc 0:1 80000000 MLO
reading MLO

24964 bytes read
OMAP3 beagleboard.org # nand erase 0 80000

NAND erase: device 0 offset 0x0, size 0x80000
Erasing at 0x60000 -- 100% complete.
OK
OMAP3 beagleboard.org # nandecc hw 2
HW ECC [X-loader/U-boot layout] selected
OMAP3 beagleboard.org # nand write 80000000 0 80000

NAND write: device 0 offset 0x0, size 0x80000
 524288 bytes written: OK
(power off, take out microSD and then on)
Texas Instruments X-Loader 1.5.1 (Jan  6 2012 - 16:49:06)
Beagle Rev C1/C2/C3
Loading u-boot.bin from nand
u-boot.bin not found or blank nand contents - attempting serial boot . . .
## Ready for binary (kermit) download to 0x80008000 at 115200 bps...

As can be seen from above, our test passed on beagleboard C3. We are able to build x-loader/MLO,

put it on SD, then use u-boot to flash it to NAND and then take out the SD and then see the

X-Loader boot message on the serial console. 

c) Now, we take this step and test it on our DM3730 board. We are using the same Micron memory as the beagleboard C3.

Texas Instruments X-Loader 1.5.1 (Nov  2 2011 - 15:36:12)
Wiser2 with old memory
Reading boot sector
Loading u-boot.bin from mmc


U-Boot 2010.06-dirty (Jan 16 2012 - 01:18:53)

OMAP34xx/35xx-GP ES2.1, CPU-OPP2 L3-165MHz
OMAP3 Beagle board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  HW ECC [Kernel/FS layout] selected
256 MiB
*** Warning - bad CRC or NAND, using default environment

In:    serial
Out:   serial
Err:   serial
Wiser2
eth gpio 22=1
Die ID #420800029ff800000160a74507005015
Net:   smc911x-0
Hit any key to stop autoboot:  0 
OMAP3 beagleboard.org # mmc init
mmc1 is available
OMAP3 beagleboard.org # fatload mmc 0:1 80000000 MLO
reading MLO

24964 bytes read
OMAP3 beagleboard.org # nand erase 0 80000

NAND erase: device 0 offset 0x0, size 0x80000
Erasing at 0x60000 -- 100% complete.
OK
OMAP3 beagleboard.org # nandecc hw 2
HW ECC [X-loader/U-boot layout] selected
OMAP3 beagleboard.org # nand write 80000000 0 80000

NAND write: device 0 offset 0x0, size 0x80000
 524288 bytes written: OK
( we power off, take out microSD and power on)

OMAP3 beagleboard.org # 6060606060606060

As can be seen above, the 60,60,60 is because the TI bootROM is not finding any suitable X-Loader for it to boot from NAND.

d) I checked that ECC is correct. As can be seen below:

- first dump memory to check what's there
# md.l 80000000 10
80000000: 000000c0 00000000 00000100 01400080    ..............@.
80000010: 00000040 00000040 40080008 00000008    @...@......@....
80000020: 00480040 00011040 00900100 00400488    @.H.@.........@.
80000030: 00000200 02040000 00a00040 020000c0    ........@.......
- then without changing ecc, we readback u-boot block to check that we get our expected ecc error
OMAP3 beagleboard.org # nand read 80000000 0 80000

NAND read: device 0 offset 0x0, size 0x80000
Error: Bad compare! failed

- now we switch to the correct ecc for bootROM and dump the area
OMAP3 beagleboard.org # nandecc hw 2
HW ECC [X-loader/U-boot layout] selected
OMAP3 beagleboard.org # nand read 80000000 0 80000

NAND read: device 0 offset 0x0, size 0x80000
 524288 bytes read: OK
OMAP3 beagleboard.org # md.l 80000000 40
80000000: 00005b48 40200800 ea000012 e59ff014    H[.... @........
80000010: e59ff010 e59ff00c e59ff008 e59ff004    ................
80000020: e59ff000 e51ff004 40200960 12345678    ........`. @xV4.
80000030: 12345678 12345678 12345678 12345678    xV4.xV4.xV4.xV4.
80000040: 12345678 12345678 40200800 40200800    xV4.xV4... @.. @
80000050: 40206348 402094c4 e10f0000 e3c0001f    Hc @.. @........
80000060: e38000d3 e129f000 e24f0068 e2800004    ......).h.O.....
80000070: e3a02040 e0802002 e3a01101 e3a03602    @ ... .......6..
80000080: e0811003 e3a03b3e e0811003 e8b007f8    ....>;..........
80000090: e8a107f8 e1500002 1afffffb eb00003a    ......P.....:...

This matches the expected data as we read it from disk.
# hexdump -C /mnt/129/home/test/work/x-loader/MLO.forNAND | head -10
00000000  48 5b 00 00 00 08 20 40  12 00 00 ea 14 f0 9f e5  |H[.... @........|
00000010  10 f0 9f e5 0c f0 9f e5  08 f0 9f e5 04 f0 9f e5  |................|
00000020  00 f0 9f e5 04 f0 1f e5  60 09 20 40 78 56 34 12  |........`. @xV4.|
00000030  78 56 34 12 78 56 34 12  78 56 34 12 78 56 34 12  |xV4.xV4.xV4.xV4.|
00000040  78 56 34 12 78 56 34 12  00 08 20 40 00 08 20 40  |xV4.xV4... @.. @|
00000050  48 63 20 40 c4 94 20 40  00 00 0f e1 1f 00 c0 e3  |Hc @.. @........|
00000060  d3 00 80 e3 00 f0 29 e1  68 00 4f e2 04 00 80 e2  |......).h.O.....|
00000070  40 20 a0 e3 02 20 80 e0  01 11 a0 e3 02 36 a0 e3  |@ ... .......6..|
00000080  03 10 81 e0 3e 3b a0 e3  03 10 81 e0 f8 07 b0 e8  |....>;..........|
00000090  f8 07 a1 e8 02 00 50 e1  fb ff ff 1a 3a 00 00 eb  |......P.....:...|

I'm really confused why this is not working. I was able to get UBIFS/rootfs to work fine from NAND.

It is just the first stage (MLO/x-loader) that is not working from NAND and I'm really

stumped/banging head on wall as to why this is not working. I'd appreciate any help/suggestions

that you may have.

Thanks,
jaya

over 13 years ago

0 Vaibhav Hiremath over 13 years ago

TI__Expert 8180 points

Above steps looks ok to me, its strange behavior. Can you also share the code changes you made to the x-loader & u-boot here? May give some pointers? I can review it for you...

Thanks,

Vaibhav

0 Jaya Kumar over 13 years ago in reply to Vaibhav Hiremath

Expert 1190 points

Hi Vaibhav,

Thanks for your reply. Yes, I am happy to post the code changes. I had an idea after reading your post. Since my DM3730 board is almost identical to XM except having beagleboard C3 memory, I decided to try to eliminate as many differences as possible. So I switched to using the pre-built u-boot, meaning my changes are only to x-loader. The changes I made to x-loader for my board are to hardcode the memory type. Please see diff appended below.

a) using prebuilt u-boot from devkit 2.1 for beagleboard

root@ubuntu1004lts:~/nand_work/TI_Android_GingerBread_2_3_4_DevKit_2_1/Prebuilt_Images/beagleboard-rev-c4# md5sum Boot_Images/u-boot.bin 
48cf9068ec8c18856b47acca444a3c5c  Boot_Images/u-boot.bin

# md5sum /media/boot/u-boot.bin 
48cf9068ec8c18856b47acca444a3c5c  /media/boot/u-boot.bin

b) changes done to x-loader since we don't use beagleboard revision gpio and to hardcode memory type to the 256MB DDR+NAND (same as in C3)

test@lucidgingerbreadbb:~/work/x-loader/x-loader$ git diff
diff --git a/board/omap3530beagle/omap3530beagle.c b/board/omap3530beagle/omap3530beagle.c
index ba52ea7..74b33b7 100644
--- a/board/omap3530beagle/omap3530beagle.c
+++ b/board/omap3530beagle/omap3530beagle.c
@@ -98,8 +98,7 @@ int board_init(void)
 u32 get_mem_type(void)
 {
        
-       if (beagle_revision() == REVISION_XM)
-               return GPMC_NONE;
+       /* XXXjaya we should use GPMC_NAND */
 
        u32   mem_type = get_sysboot_value();
        switch (mem_type) {
@@ -164,50 +163,7 @@ u32 cpu_is_3410(void)
        }
 }
 
-/******************************************
- * beagle_identify
- * Description: Detect if we are running on a Beagle revision Ax/Bx,
- *             C1/2/3, C4 or D. This can be done by reading
- *             the level of GPIO173, GPIO172 and GPIO171. This should
- *             result in
- *             GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
- *             GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
- *             GPIO173, GPIO172, GPIO171: 1 0 1 => C4
- *             GPIO173, GPIO172, GPIO171: 0 0 0 => XM
- *             default                          => XM
- ******************************************/
-int beagle_revision(void)
-{
-       int rev;
 
-       omap_request_gpio(171);
-       omap_request_gpio(172);
-       omap_request_gpio(173);
-       omap_set_gpio_direction(171, 1);
-       omap_set_gpio_direction(172, 1);
-       omap_set_gpio_direction(173, 1);
-
-       rev = omap_get_gpio_datain(173) << 2 |
-               omap_get_gpio_datain(172) << 1 |
-               omap_get_gpio_datain(171);
-
-       /* Default newer board revisions to XM */
-       switch(rev) {
-       case REVISION_AXBX:
-       case REVISION_CX:
-       case REVISION_C4:
-               break;
-       case REVISION_XM:
-       default:
-               rev = REVISION_XM;
-       }
-
-       omap_free_gpio(171);
-       omap_free_gpio(172);
-       omap_free_gpio(173);
-
-       return rev;
-}
 
 #ifdef CFG_3430SDRAM_DDR
 
@@ -252,30 +208,7 @@ void config_3430sdram_ddr(void)
        /* setup sdrc to ball mux */
        __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING);
 
-       switch(beagle_revision()) {
-       case REVISION_C4:
-               if (identify_xm_ddr() == NUMONYX_MCP) {
-                       __raw_writel(0x4, SDRC_CS_CFG); /* 512MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_1);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-               } else if (identify_xm_ddr() == MICRON_MCP) {
-                       /* Beagleboard Rev C5 */
-                       __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_1);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1);
-               } else {
+       /* XXXjaya: hardcode to beagleboard C3 */
                        __raw_writel(0x1, SDRC_CS_CFG); /* 128MB/bank */
                        __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0);
                        __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_1);
@@ -285,42 +218,6 @@ void config_3430sdram_ddr(void)
                        __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
                        __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
                        __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-               }
-               break;
-       case REVISION_XM:
-               if (identify_xm_ddr() == MICRON_DDR) {
-                       __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_1);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1);
-               } else {
-                       __raw_writel(0x4, SDRC_CS_CFG); /* 512MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_1);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-               }
-               break;
-       default:
-               __raw_writel(0x1, SDRC_CS_CFG); /* 128MB/bank */
-               __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0);
-               __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_1);
-               __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
-               __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
-               __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
-               __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
-               __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
-               __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-       }
 
        __raw_writel(SDP_SDRC_POWER_POP, SDRC_POWER);
 
@@ -484,15 +381,10 @@ void prcm_init(void)
        sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2);    /* set M4 */
        sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2);    /* set M3 */
 
-       if (beagle_revision() == REVISION_XM) {
+       /* XXXjaya: hardcode to DM3730 setup */
                sr32(CM_CLKSEL3_PLL, 0, 5, CORE_DPLL_PARAM_M2);   /* set M2 */
                sr32(CM_CLKSEL2_PLL, 8, 11, CORE_DPLL_PARAM_M);   /* set m */
                sr32(CM_CLKSEL2_PLL, 0, 7, CORE_DPLL_PARAM_N);    /* set n */
-       } else {
-               sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2);   /* set M2 */
-               sr32(CM_CLKSEL2_PLL, 8, 11, dpll_param_p->m);   /* set m */
-               sr32(CM_CLKSEL2_PLL, 0, 7, dpll_param_p->n);    /* set n */
-       }
 
        sr32(CM_CLKEN_PLL, 20, 4, dpll_param_p->fsel);  /* FREQSEL */
        sr32(CM_CLKEN_PLL, 16, 3, PLL_LOCK);    /* lock mode */
@@ -564,28 +456,7 @@ int misc_init_r(void)
 {
        int rev;
 
-       rev = beagle_revision();
-       switch (rev) {
-       case REVISION_AXBX:
-               printf("Beagle Rev Ax/Bx\n");
-               break;
-       case REVISION_CX:
-               printf("Beagle Rev C1/C2/C3\n");
-               break;
-       case REVISION_C4:
-               if (identify_xm_ddr() == NUMONYX_MCP)
-                       printf("Beagle Rev C4 from Special Computing\n");
-               else if(identify_xm_ddr() == MICRON_MCP)
-                       printf("Beagle Rev C5\n");
-               else
-                       printf("Beagle Rev C4\n");
-               break;
-       case REVISION_XM:
-               printf("Beagle xM\n");
-               break;
-       default:
-               printf("Beagle unknown 0x%02x\n", rev);
-       }
+       printf("Wiser2 with old mem\n");
 
        return 0;
 }
test@lucidgingerbreadbb:~/work/x-loader/x-loader$ git diff
diff --git a/board/omap3530beagle/omap3530beagle.c b/board/omap3530beagle/omap3530beagle.c
index ba52ea7..74b33b7 100644
--- a/board/omap3530beagle/omap3530beagle.c
+++ b/board/omap3530beagle/omap3530beagle.c
@@ -98,8 +98,7 @@ int board_init(void)
 u32 get_mem_type(void)
 {
        
-       if (beagle_revision() == REVISION_XM)
-               return GPMC_NONE;
+       /* XXXjaya we should use GPMC_NAND */
 
        u32   mem_type = get_sysboot_value();
        switch (mem_type) {
@@ -164,50 +163,7 @@ u32 cpu_is_3410(void)
        }
 }
 
-/******************************************
- * beagle_identify
- * Description: Detect if we are running on a Beagle revision Ax/Bx,
- *             C1/2/3, C4 or D. This can be done by reading
- *             the level of GPIO173, GPIO172 and GPIO171. This should
- *             result in
- *             GPIO173, GPIO172, GPIO171: 1 1 1 => Ax/Bx
- *             GPIO173, GPIO172, GPIO171: 1 1 0 => C1/2/3
- *             GPIO173, GPIO172, GPIO171: 1 0 1 => C4
- *             GPIO173, GPIO172, GPIO171: 0 0 0 => XM
- *             default                          => XM
- ******************************************/
-int beagle_revision(void)
-{
-       int rev;
 
-       omap_request_gpio(171);
-       omap_request_gpio(172);
-       omap_request_gpio(173);
-       omap_set_gpio_direction(171, 1);
-       omap_set_gpio_direction(172, 1);
-       omap_set_gpio_direction(173, 1);
-
-       rev = omap_get_gpio_datain(173) << 2 |
-               omap_get_gpio_datain(172) << 1 |
-               omap_get_gpio_datain(171);
-
-       /* Default newer board revisions to XM */
-       switch(rev) {
-       case REVISION_AXBX:
-       case REVISION_CX:
-       case REVISION_C4:
-               break;
-       case REVISION_XM:
-       default:
-               rev = REVISION_XM;
-       }
-
-       omap_free_gpio(171);
-       omap_free_gpio(172);
-       omap_free_gpio(173);
-
-       return rev;
-}
 
 #ifdef CFG_3430SDRAM_DDR
 
@@ -252,30 +208,7 @@ void config_3430sdram_ddr(void)
        /* setup sdrc to ball mux */
        __raw_writel(SDP_SDRC_SHARING, SDRC_SHARING);
 
-       switch(beagle_revision()) {
-       case REVISION_C4:
-               if (identify_xm_ddr() == NUMONYX_MCP) {
-                       __raw_writel(0x4, SDRC_CS_CFG); /* 512MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_1);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-               } else if (identify_xm_ddr() == MICRON_MCP) {
-                       /* Beagleboard Rev C5 */
-                       __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_1);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1);
-               } else {
+       /* XXXjaya: hardcode to beagleboard C3 */
                        __raw_writel(0x1, SDRC_CS_CFG); /* 128MB/bank */
                        __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0);
                        __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_1);
@@ -285,42 +218,6 @@ void config_3430sdram_ddr(void)
                        __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
                        __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
                        __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-               }
-               break;
-       case REVISION_XM:
-               if (identify_xm_ddr() == MICRON_DDR) {
-                       __raw_writel(0x2, SDRC_CS_CFG); /* 256MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_MICRON_XM, SDRC_MCFG_1);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(MICRON_V_ACTIMA_200, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(MICRON_V_ACTIMB_200, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_200MHz, SDRC_RFR_CTRL_1);
-               } else {
-                       __raw_writel(0x4, SDRC_CS_CFG); /* 512MB/bank */
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_0);
-                       __raw_writel(SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM, SDRC_MCFG_1);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
-                       __raw_writel(NUMONYX_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
-                       __raw_writel(NUMONYX_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
-                       __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-               }
-               break;
-       default:
-               __raw_writel(0x1, SDRC_CS_CFG); /* 128MB/bank */
-               __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_0);
-               __raw_writel(SDP_SDRC_MDCFG_0_DDR, SDRC_MCFG_1);
-               __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_0);
-               __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_0);
-               __raw_writel(MICRON_V_ACTIMA_165, SDRC_ACTIM_CTRLA_1);
-               __raw_writel(MICRON_V_ACTIMB_165, SDRC_ACTIM_CTRLB_1);
-               __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_0);
-               __raw_writel(SDP_3430_SDRC_RFR_CTRL_165MHz, SDRC_RFR_CTRL_1);
-       }
 
        __raw_writel(SDP_SDRC_POWER_POP, SDRC_POWER);
 
@@ -484,15 +381,10 @@ void prcm_init(void)
        sr32(CM_CLKSEL_DSS, 0, 5, PER_M4X2);    /* set M4 */
        sr32(CM_CLKSEL_DSS, 8, 5, PER_M3X2);    /* set M3 */
 
-       if (beagle_revision() == REVISION_XM) {
+       /* XXXjaya: hardcode to DM3730 setup */
                sr32(CM_CLKSEL3_PLL, 0, 5, CORE_DPLL_PARAM_M2);   /* set M2 */
                sr32(CM_CLKSEL2_PLL, 8, 11, CORE_DPLL_PARAM_M);   /* set m */
                sr32(CM_CLKSEL2_PLL, 0, 7, CORE_DPLL_PARAM_N);    /* set n */
-       } else {
-               sr32(CM_CLKSEL3_PLL, 0, 5, dpll_param_p->m2);   /* set M2 */
-               sr32(CM_CLKSEL2_PLL, 8, 11, dpll_param_p->m);   /* set m */
-               sr32(CM_CLKSEL2_PLL, 0, 7, dpll_param_p->n);    /* set n */
-       }
 
        sr32(CM_CLKEN_PLL, 20, 4, dpll_param_p->fsel);  /* FREQSEL */
        sr32(CM_CLKEN_PLL, 16, 3, PLL_LOCK);    /* lock mode */
@@ -564,28 +456,7 @@ int misc_init_r(void)
 {
        int rev;
 
-       rev = beagle_revision();
-       switch (rev) {
-       case REVISION_AXBX:
-               printf("Beagle Rev Ax/Bx\n");
-               break;
-       case REVISION_CX:
-               printf("Beagle Rev C1/C2/C3\n");
-               break;
-       case REVISION_C4:
-               if (identify_xm_ddr() == NUMONYX_MCP)
-                       printf("Beagle Rev C4 from Special Computing\n");
-               else if(identify_xm_ddr() == MICRON_MCP)
-                       printf("Beagle Rev C5\n");
-               else
-                       printf("Beagle Rev C4\n");
-               break;
-       case REVISION_XM:
-               printf("Beagle xM\n");
-               break;
-       default:
-               printf("Beagle unknown 0x%02x\n", rev);
-       }
+       printf("Wiser2 with old mem\n");
 
        return 0;
 }

c) Tested this on my board using pre-built u-boot and my minimally changed x-loader.

Texas Instruments X-Loader 1.5.1 (Jan 17 2012 - 12:08:41)
Wiser2 with old mem
Reading boot sector
Loading u-boot.bin from mmc


U-Boot 2010.06 (Jul 08 2011 - 04:37:45)

OMAP34xx/35xx-GP ES2.1, CPU-OPP2 L3-165MHz
OMAP3 Beagle board + LPDDR/NAND
I2C:   ready
DRAM:  256 MiB
NAND:  HW ECC [Kernel/FS layout] selected
256 MiB
*** Warning - bad CRC or NAND, using default environment

In:    serial
Out:   serial
Err:   serial
Beagle xM Rev A/C
Die ID #420800029ff800000160a74507005015
Hit any key to stop autoboot:  0 
OMAP3 beagleboard.org # 
OMAP3 beagleboard.org # mmc init
mmc1 is available
OMAP3 beagleboard.org # fatload mmc 0:1 80000000 MLO
reading MLO

23636 bytes read
OMAP3 beagleboard.org # nandecc hw 2
HW ECC [X-loader/U-boot layout] selected
OMAP3 beagleboard.org # nand erase 0 80000

NAND erase: device 0 offset 0x0, size 0x80000
Erasing at 0x60000 -- 100% complete.
OK
OMAP3 beagleboard.org # nand write 80000000 0 80000

NAND write: device 0 offset 0x0, size 0x80000
 524288 bytes written: OK
OMAP3 beagleboard.org # reset
resetting ...

( powered off, took out microSD, powered back on)
60

So the result is still the same. I was starting to think that perhaps one of the changes I made to x-loader is causing this failure

but that doesn't seem consistent with the fact that the same x-loader can work fine from SD.

I would welcome any advice. I'm properly stumped at the moment.

Thanks,

jaya

Processors

Processors forum

Problem figuring out why NAND boot with x-loader isn't working