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DSPLink fails after changing the processor speed to 375mhz

Christopher Fury
Expert 1130 points
Other Parts Discussed in Thread: OMAP-L137

We have a processor board with an OMAP-l137 chip that runs fine when the clock is set to 300mhz... UBL first stage bootloader loads uboot (which reports 300mhz clock speed) which loads linux which then can load our dsp image.  Everything seems to be just fine.

However, when we set the clock speed to 375 mhz in UBL, everything works up until we try to launch the image via dsplink.   It simply hangs up the cpu at that point.  Any idea why that's happening and what I can do to get it working again?

Thanks,

Chris

  • 0
    Expert 1130 points

    Bump and another question: is there an easy way to change/override the clock speed in the dsplink configuration?  I would like to just have an entry that said clockspeed = 3750000 or whatever.

    Thanks,
    Chris 

  • 0 in reply to Christopher Fury
    Expert 1130 points

    How do DSPLink and the tconf files work on the DSP Pin Mux settings?   If I set the clock speed of the OMAP-L137 chip to 375 mhz in the first stage boot loader and then run uboot and boot into linux, both the DSP and the ARM are running at 375mhz, right?

    What happens when I then load a dsplink image with a "clockspeed: 3000000" entry buried in the OMAP-l137 tconf configuration.   Can I override just this one setting?

    Thanks,
    Chris+ 

  • 0 in reply to Christopher Fury
    Prodigy 215 points

    Sorry Christopher, I know how frustrating it is to log a solution to your own problem!  Also sorry that I'm not here to help.  I am just starting to investigate trying to up the clock on some new SOMs from 300 to 375 and ran across your plight.  I'm curious as to what version of DSPLink you're using?  I'm using DSPLink 1.65 and don't see "clockspeed" anywhere.  I have several instances of "clockRate: 300," (and similar), and assume those are in MHz, instead of your apparent Hz.

    My end-goal is to improve the boot speed by increasing the processor clock and also the EMIFA clock.  As a result, I'm mucking around looking at (out-dated) UBL code.  I'm looking for a pre-compiled 375MHz UBL binary with suggested EMIFA settings.  My existing UBL has a 300MHz clock and 25MHz EMIFA clock, and I'm wondering why the EMIFA clock is so slow.  The processor default is 100MHz, but UBL slows it down immediately.

    I assume that by now you've solved your problem and found that you can, indeed, override that one setting and everything works just fine?  Please reply with your findings and any thoughts you might have on the EMIFA clock and/or other problems you ran into with regards to upping the processor speed.

    Thanks,


    Dan