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AM3871 GMTCLK signal

Hello,

The device data sheet describes this as "source asynchronous transmit clock" in (G)MII mode (pp 46, 51).  In the Technical Reference Manual, it is defined as being synchronous (pp 1093, 1094).  Can you clear this up?

Also, figure 8-9 appears misleading in that it shows GMII_GMTCLK as an input to the processor (from the PHY), when it is defined as an output.  Should this input be the MTCLK signal instead?

Finally, the terms GMII mode (used in data sheet) and GIG mode (used in Tech Ref Manual) appear to be interchangeable - is this the case?

Thanks in advance.

Peter Clerico

  • Peter,

    Please see response below from our developer:

    • Asynchronous vs synchronous?
      The TRM matches the Module Specs so I would say the Datasheet is wrong and should be corrected.
    • Figure 8-9 GMTCLK direction confusing?
      As described in Table 8-15 and 8-16 GMTCLK is an output in 10/100 mode and normally an input in 1000 mode because the PHY should sourcing the clock. But In the case the PHY does not or cannot generate the clock the device can source in 1000 mode as well.
    • GMII vs GIG?
      GMII describes an interface specification. The term GIG is used to specific the 1000 mode vs the 10/100 mode that the GMII interface allows.

    BR,

    Viet

  • Thanks Viet,

    One more  question - is GMTCLK internally derived or is it derived from MTCLK?

    Peter