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AM335x SPI CS/EN

Peter Reibrt Hansen
Prodigy 50 points

Hi

I need 3 SPI CS for my design.

It seemse like the SPI0 has 4 Chip sellect or Enable pins, according to the Datasheet, but in the PIN MUX tool only has SPI0_CS0 and SPI0_CS1, which pins can be used for SPI0_CS2 and SPI0_CS3.

Kind Regards

Reibert

 

  • 0
    Expert 2280 points

    Hi,

    In the AM335x datasheet I read "Up to Two Master/Slave McSPI Serial Interfaces" and "Up to Two Chip Selects" (for each interface). So: SPI0_CS0 SPI0_CS1 and SPI1_CS0 SPI1_CS1. Also have a look at TRM section 24.1.2. Hope this helps.

    Regards, Max







  • 0 in reply to Qmax
    Intellectual 290 points

    Yes, I read that there are two SPI modules in the chip. Each module can support being either a slave, or a master supporting 2 slave devices(only 2 CS lines are balled out for each module, so it's 2 not 4).

    This means that you can support up to four slave SPI devices with two of them operating concurrently as each module has its own data and clock lines.

    With helping GPIO lines, an external multiplexer and trickery it may be possible to get more than 2 slaves working off each module.

    Regards,

    Roger

  • 0 in reply to Qmax
    Prodigy 50 points

    Hi Max and Roger

     

    I missed section 24.1.2, which clearly state, that they aren’t pinned out. The reason for asking was that in section "24.3.1 SPI Interface" is seems like that there are 4 CS available.

    But that isn't the case, so I might do it with an additional GPIO as Roger suggested.

    Thanks.

     

    Kind regards

    Reibert

     

     

     

  • 0 in reply to Peter Reibrt Hansen
    Intellectual 290 points

    Peter Reibrt Hansen said:

    Hi Max and Roger

     

    I missed section 24.1.2, which clearly state, that they aren’t pinned out. The reason for asking was that in section "24.3.1 SPI Interface" is seems like that there are 4 CS available.

    But that isn't the case, so I might do it with an additional GPIO as Roger suggested.

    Thanks.

     

    Kind regards

    Reibert

    Hi Peter, I think you have misunderstood. There ARE 4 CS available, 2 for each SPI module in the chip. See section 2.3.6.5 in the AM335x datasheet.

    The chip offers these signals:

    spi0_cs0, spi0_cs1, spi0_d0, spi0_d1, spi0_sclk

    spi1_cs0, spi1_cs1, spi1_d0, spi1_d1, spi1_sclk

    Regards

    Roger.

  • 0 in reply to Roger 8421
    Prodigy 50 points

    Hi Roger

    Thanks,

    Anyway I do understand it after Max wrote that I should see section 24.1.2.

     

    Regards

    Peter

     

  • 0 in reply to Peter Reibrt Hansen
    TI__Guru 62855 points

    The McSPI module implemented in AM335x is also used in many other TI devices.  The documentation provided in the McSPI section of the TRM was created to describe the function of the McSPI module, with unsupported features specific to AM335x defined in the Unsupported McSPI Features section.  The McSPI section describes all four chip selects supported by the module, but the Unsupported McSPI Features section describes how only 2 of the four chip selects are available on the AM335x device.

    AM335x has two McSPI modules with each having two 2 of the 4 chip selects available.

     

    Regards,

    Paul

  • 0 in reply to peaves
    Intellectual 365 points

    We can use 2 SPI's with CS0 and CS1. We want to initilize it in board_am335x3vm.c