This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

J784S4XEVM: PCIe write transactions fail

Part Number: J784S4XEVM

Hi experts,

I am using 2 J784S4_EVM board with PCIe : 1 EP & 1 RC. 

SDK RTOS & SDK linux 10

RC --> EP read/ write transactions success

EP --> RC read success & write fail.

What I have done : 

  • RC linux 
    • modify dtb dma range to DDR 0xA800.0000
    • modify cadence driver BAR config to enable BAR 1
  • EP setup OB translation to RC BAR 1

This is lspci -v output from the RC : 

image.png

I have checked RC inbound memory and BAR config reg after the boot and they seems correct

I have tried to write from linux using devmem2 and from c7x, but both crash.

This is the EP linux output (1 read then 1 write) : 

The read value corresponds to the value on the RC

pcie_write_crash_ep2rc.jpg

Thanks for your help

Charles