DRA829J: DDR BIST initialization delay

Hi,

Joao Simoes said:

Our implementation is working, but we found this delay deviation and we need to confirm if this is required.

This was done to allow some time for the BIST to init all the DDR memory to 0. Can you double confirm that indeed the entire DDR is zeroed out even without the 1 Second delay.

- Keerthy

Hi,

The link I provided was wrong, I have updated the original post.
I'm not sure I understood correctly.
I'm focusing on this code:

(First delay(1000))

In my logic:

• (...)
• Set BIST Mode to Memory Initialization function
• Set BIST Data Patterns
• Clear Interrupt Status
• I do not delay before initiating BIST
• Initiate BIST operation
• Loop to poll BIST status

Using debugger step by step, I can clearly see that right after "Initiate BIST operation", RAM is indeed cleared to zeros and I can use it.

Thank you,
João Simões

I will need to check internally on why that was added but as long as you see the DDR is zeroed. This looks good.

- Keerthy

Hi Keerthy,

Is there any update on the topic?

Thank you,
João Simões

Hi,

I will get back early next week on this as I am out of office this week. 

In the meantime can you run memtester in Linux? 

Best Regards,

Keerthy