Part Number: TDA4VM
Hi Support Team,
I am working with the TDA4VM EVM and the enet_lwip_freertos example, running on the MCU2_1 R5F core. When transmitting UDP packets from a PC, the board receives and processes the packets correctly. However, when transmitting UDP packets from an FPGA board, the TDA4VM drops the packets.
By inspecting the CPSW2G ALE registers, I observed that the “ALE Multicast Port Mask” indicates that every FPGA packet is being dropped at the ALE stage. In other words, the packets are seen at the PHY, but they do not reach the R5F RX path due to ALE multicast/port mask configuration.
Could you please advise on the correct ALE / CPSW2G configuration (e.g., default RX flow vs. destination MAC-based flow, multicast/broadcast port masks) required to ensure that UDP packets from the FPGA are forwarded to the MCU2_1 host port in this enet_lwip_freertos setup?
Thanks
Balaji.