This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VE-Q1: I2C0_SCL tLOW time can't meet datasheet requirement

Part Number: TDA4VE-Q1
Other Parts Discussed in Thread: TDA4VL

Dear TI expert.

We use TDA4VL as our project solution and connect the I2C0 interface to PMIC(TPS6594133) directly with 2.2K pull-up resistors.

The I2C is work at fast mode(400KHz)

And according to the HW test, we found that the tLOW time can't meet the requirement from datasheet. The duty time is about 50% and that is mean when the SCL frequency is 400KHz, tLOW is equal to tHIGH which is about 1.25uS. But the datasheet just show that the MIN of tLOW is 1.3uS. How can we meet this requirement? Can we just change the duty time via setting the register?

BTW, The actual measured of tLOW value is 1.22uS.

image.png