AM62A7-Q1: The MCU program cannot perform floating-point operations

Hello Yuwei,

Please provide additional information. Which core are you trying to program? What software are you running on that core? What version of software are you using?

Regards,

Nick

Hi Nick,

Nick Saulnier said:

Which core are you trying to program?

The core we use is MCUR5.

Nick Saulnier said:

What software are you running on that core?

We use the EB protocol stack and schedule our own created task functions through the OS.

Nick Saulnier said:

What version of software are you using?

The version we are using is 10.01.

The problem we're encountering now is that when executing the following code, the program crashes and the PC pointer is moved to position 0x4.

volatile float32 test = 0.0;
test = test + 1.0;

I checked the assembly code, and executing the following statement causes an interrupt, and the PC pointer is forcibly directed to position 0x4.

vldr    s0,[r1]

The value stored in the r1 register is 0x791678bc.

I’m not sure why this is happening, please help check the following.

Thanks,

Yuwei

Hello Yuwei,

I have reassigned your thread to a team member who is familiar with AutoSAR development on R5F. Apologies for the delay, it will be another day before we can get you an initial response.

Regards,

Nick

Hello Yuwei,

While the assigned owner is ooo today, please check the below:

 RE: TDA4VM: Enabling FPU(Floating point unit) in MCU R5F core 

Cortex-r5 section of : https://software-dl.ti.com/codegen/docs/tiarmclang/rel3_2_1_LTS/getting_started_guide/supported_arm_processors.html# 

The below compiler options can be used to enable the FPU:

-mfloat-abi=hard -mfpu=vfpv3-d16

Please check the "compilerBuildOptions" of any "example.projectspec" file in the MCU+SDK for reference:

Regards,
Krithika

Hi Krithika,

Krithika Ravi said:

-mfloat-abi=hard -mfpu=vfpv3-d16

I checked my compilation options, and I think my compilation options include this content.

At the same time, I enabled the FPU-related coprocessor, activating the floating-point arithmetic functionality.

At that time, the situation I described still existed. When I tried to store data into the S0 register, an interrupt would occur, and the PC pointer would point to address 0x4.

vldr    s0,[r1]

I have the following questions that need to be answered：

1.In CCS, I checked the register window of the CCS, and I didn't find the CACR register in it. how do I view the CACR register?

2.Are there any other suggestions for checking issues regarding the situation where accessing the S0 register triggers an interrupt?

Thanks,

Yuwei

Hi Krithika,

Is there any progress on the issue?

Thanks,

Yuwei

Hi Yuwei,

I am unable to reproduce the abort. Can you tell me which version of ti-arm-clang are you using? And did you try this code in any of the default SDKs and check if it works?

Regards,
Nihar Potturu

Hi Krithika,

Nihar Potturu said:

Can you tell me which version of ti-arm-clang are you using?

The version I am using is ti-cgt-armllvm_3.2.2.LTS,

Nihar Potturu said:

And did you try this code in any of the default SDKs and check if it works?

We are adapting the protocol stack code and are not using TI's SDK.

I want to know which registers my issue might be related to. I think I should thoroughly check the relevant registers.

Thanks,

Yuwei