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AM6442: PRU-ICSSG Shared Memory and MSRAM Usage

cokk guzel
Prodigy 10 points
Part Number: AM6442
Other Parts Discussed in Thread: SYSCONFIG

Hello,

I am currently working on a setup involving the AM64x platform and the PRU-ICSSG module, where I intend to run two separate firmware images concurrently on two different slices within the same PRU-ICSSG instance (e.g., PRU0 and PRU1). One of the slice will run a standard Ethernet firmware and other slice will run a custom firmware dedicated to use GPI/O pins and application-specific logic.

My primary concern is regarding shared memory access and potential conflicts, specifically involving the standard Ethernet firmware.

Does the standard Industrial Ethernet PRU firmware (e.g., the one provided in the SDK) utilize any portion of the Shared RAM (PRU-ICSS Shared Memory) for its operation, or does it solely use its own dedicated Data RAM?

If it does use Shared RAM, which specific address ranges/offsets within the Shared RAM are typically reserved or actively used by the standard Ethernet firmware?

If I define a custom memory region for the PRU-ICSSG using the SysConfig tool, specifically  MSRAM region, how can the custom firmware safely and effectively utilize this allocated MSRAM?

When accessing the defined MSRAM region from either PRU, what is the expected typical latency?

Any guidance on best practices for memory partitioning when running a standard communication stack alongside custom logic on the same PRU-ICSSG would be greatly appreciated.

Thank you in advance for your assistance.

  • 0
    TI__Guru** 105270 points

    Hello Cokk,

    I have sent you a friend request. Please send me a direct message to discuss your multiple e2e accounts and email accounts.

    Additional questions:

    1) which industrial Ethernet firmwares are you using?

    2) what OS is running on A53 in your usecase?

    Regards,

    Nick

  • 0 in reply to Nick Saulnier
    Prodigy 10 points

    Hello Nick,

    This is my primary E2E account. The other accounts were created only because I temporarily lost access to this one. There was no intention to misuse the platform.

    Currently, Linux is running on the Cortex-A53 cores. Could you please clarify how this is relevant to the PRU-related behavior or limitation you are describing? In particular, I would appreciate more details on whether the presence of Linux on the A53 impacts PRU operation.

    Regarding Ethernet, I am using the Ethernet firmware provided in SDK 11.02.024 without modifications.

    Regards.

  • 0 in reply to acoplu coplu
    TI__Guru** 105270 points

    Hello,

    If you are using R5F cores to control Ethernet industrial protocols running on the PRU subsystem, then you will have to follow specific steps to get that working alongside Linux A53 cores. If you are using generic PRU Ethernet on the PRU_ICSSG cores and controlling from Linux A53, that is different.

    Your custom code should be able to use the DMEM allocation for that slice without interfering with the PRU Ethernet. I would need to check on the SMEM usage for PRU Ethernet. That may take a few days.

    Regards,

    Nick