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TDA4VL-Q1: SPI Interface Issue

jinzhong HUANG
Prodigy 100 points

Part Number: TDA4VL-Q1
Other Parts Discussed in Thread: TDA4VL

Dear TI expert

We use TDA4VL as our project solution and connect the SPI interface to UPID(Super sonic Sensor) directly .

The SPI CLK frequency 10MHz.

And according to the HW test, we found that the Tids(SDO impedance after CSN High) can't meet the requirement from datasheet. The maximum value from datasheet is 200ns and the actual measured of Tids value is 24uS/42uS( two samples).

The SPI interface is connect to UPID's SPI interface directly. Can we just config the register to change the Tids value? 

image.png

  • 0
    TI__Expert 6330 points

    HI Jinzhong,

    This appears to be a duplicate of this thread:  TDA4VE-Q1: SPI Interface Issue 

    jinzhong HUANG said:
    Can we just config the register to change the Tids value?

    There are no registers to configure this Tdis parameter. Based on TRM, we have programmability only for CSn-to-CLK timing via TCS0 bitfield; this is the Thcs parameter.

    I have a few questions:

    1. Are you running into functional issues? My understanding is the data does not matter once chip select is deasserted.
    2. Where is this requirement being defined? The attached screenshots from the original thread do not appear to reflect our datasheet.
    3. How are you performing this measurement? Can you provide the plots?

    Regards,
    Mark